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authorDoug Evans <dje@google.com>1998-02-20 00:57:03 +0000
committerDoug Evans <dje@google.com>1998-02-20 00:57:03 +0000
commit8d157f96538cb927156e184cfc94ae3580e43426 (patch)
tree9d93f098b4b98cd26295abf07880d0611f893fc0 /opcodes/m32r-opc.h
parentc3cf44c448c7ee105287fb812102ece814894689 (diff)
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* m32r-opc.[ch]: Regenerate.
Diffstat (limited to 'opcodes/m32r-opc.h')
-rw-r--r--opcodes/m32r-opc.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/opcodes/m32r-opc.h b/opcodes/m32r-opc.h
index 8adf49e..09ad058 100644
--- a/opcodes/m32r-opc.h
+++ b/opcodes/m32r-opc.h
@@ -133,7 +133,7 @@ typedef enum cgen_operand_attr {
} CGEN_OPERAND_ATTR;
/* Number of non-boolean elements in cgen_operand. */
-#define CGEN_OPERAND_MAX_ATTRS ((int) CGEN_OPERAND_ABS_ADDR)
+#define CGEN_OPERAND_NBOOL_ATTRS ((int) CGEN_OPERAND_ABS_ADDR)
/* Enum declaration for cgen_insn attrs. */
typedef enum cgen_insn_attr {
@@ -146,7 +146,7 @@ typedef enum cgen_insn_attr {
} CGEN_INSN_ATTR;
/* Number of non-boolean elements in cgen_insn. */
-#define CGEN_INSN_MAX_ATTRS ((int) CGEN_INSN_ALIAS)
+#define CGEN_INSN_NBOOL_ATTRS ((int) CGEN_INSN_ALIAS)
/* Insn types are used by the simulator. */
/* Enum declaration for m32r instruction types. */
@@ -387,7 +387,8 @@ typedef enum hw_type {
, HW_H_ABORT
/* end-sanitize-m32rx */
, HW_H_COND, HW_H_SM, HW_H_BSM, HW_H_IE
- , HW_H_BIE, HW_H_BCOND, HW_H_BPC, HW_MAX
+ , HW_H_BIE, HW_H_BCOND, HW_H_BPC, HW_H_LOCK
+ , HW_MAX
} HW_TYPE;
#define MAX_HW ((int) HW_MAX)