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authorDave Brolley <brolley@redhat.com>2001-03-05 15:55:01 +0000
committerDave Brolley <brolley@redhat.com>2001-03-05 15:55:01 +0000
commitb3466c39bc29323e1912f5fa17c70e63af56e001 (patch)
treea14bfd8c10860de783fdc96506fb1a033cb925e6 /opcodes/m32r-opc.c
parent1c7566d1677731631c070b1e30d80ad5b97ed8d5 (diff)
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2001-03-05 Dave Brolley <brolley@redhat.co
* opcodes/fr30-asm.c: Regenerate. * opcodes/fr30-desc.c: Regenerate. * opcodes/fr30-desc.h: Regenerate. * opcodes/fr30-dis.c: Regenerate. * opcodes/fr30-ibld.c: Regenerate. * opcodes/fr30-opc.c: Regenerate. * opcodes/fr30-opc.h: Regenerate. * opcodes/m32r-asm.c: Regenerate. * opcodes/m32r-desc.c: Regenerate. * opcodes/m32r-desc.h: Regenerate. * opcodes/m32r-dis.c: Regenerate. * opcodes/m32r-ibld.c: Regenerate. * opcodes/m32r-opc.c: Regenerate. * opcodes/m32r-opc.h: Regenerate. * opcodes/m32r-opinst.c: Regenerate.
Diffstat (limited to 'opcodes/m32r-opc.c')
-rw-r--r--opcodes/m32r-opc.c44
1 files changed, 33 insertions, 11 deletions
diff --git a/opcodes/m32r-opc.c b/opcodes/m32r-opc.c
index a0753f3..44d5437 100644
--- a/opcodes/m32r-opc.c
+++ b/opcodes/m32r-opc.c
@@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
+Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Binutils and/or GDB, the GNU debugger.
@@ -40,8 +40,11 @@ static unsigned int dis_hash_insn PARAMS ((const char *, CGEN_INSN_INT));
/* Instruction formats. */
-#define F(f) & m32r_cgen_ifld_table[CONCAT2 (M32R_,f)]
-
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define F(f) & m32r_cgen_ifld_table[M32R_##f]
+#else
+#define F(f) & m32r_cgen_ifld_table[M32R_/**/f]
+#endif
static const CGEN_IFMT ifmt_empty = {
0, 0, 0x0, { { 0 } }
};
@@ -172,9 +175,17 @@ static const CGEN_IFMT ifmt_satb = {
#undef F
-#define A(a) (1 << CONCAT2 (CGEN_INSN_,a))
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define A(a) (1 << CGEN_INSN_##a)
+#else
+#define A(a) (1 << CGEN_INSN_/**/a)
+#endif
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define OPERAND(op) M32R_OPERAND_##op
+#else
+#define OPERAND(op) M32R_OPERAND_/**/op
+#endif
#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
-#define OPERAND(op) CONCAT2 (M32R_OPERAND_,op)
#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
/* The instruction table. */
@@ -992,14 +1003,17 @@ static const CGEN_OPCODE m32r_cgen_insn_opcode_table[MAX_INSNS] =
};
#undef A
-#undef MNEM
#undef OPERAND
+#undef MNEM
#undef OP
/* Formats for ALIAS macro-insns. */
-#define F(f) & m32r_cgen_ifld_table[CONCAT2 (M32R_,f)]
-
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define F(f) & m32r_cgen_ifld_table[M32R_##f]
+#else
+#define F(f) & m32r_cgen_ifld_table[M32R_/**/f]
+#endif
static const CGEN_IFMT ifmt_bc8r = {
16, 16, 0xff00, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP8) }, { 0 } }
};
@@ -1148,9 +1162,17 @@ static const CGEN_IFMT ifmt_push = {
/* Each non-simple macro entry points to an array of expansion possibilities. */
-#define A(a) (1 << CONCAT2 (CGEN_INSN_,a))
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define A(a) (1 << CGEN_INSN_##a)
+#else
+#define A(a) (1 << CGEN_INSN_/**/a)
+#endif
+#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
+#define OPERAND(op) M32R_OPERAND_##op
+#else
+#define OPERAND(op) M32R_OPERAND_/**/op
+#endif
#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
-#define OPERAND(op) CONCAT2 (M32R_OPERAND_,op)
#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
/* The macro instruction table. */
@@ -1562,8 +1584,8 @@ static const CGEN_OPCODE m32r_cgen_macro_insn_opcode_table[] =
};
#undef A
-#undef MNEM
#undef OPERAND
+#undef MNEM
#undef OP
#ifndef CGEN_ASM_HASH_P