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| author | Nick Clifton <nickc@redhat.com> | 2003-12-03 17:38:48 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2003-12-03 17:38:48 +0000 |
| commit | 8884595866edbe6697a1268f5605b7ffe91efb0a (patch) | |
| tree | 1710b68cb96d5cba8449135a5113d5c9a6a8c62f /opcodes/m32r-ibld.c | |
| parent | f8fc3443814cb6f315680a7fb34ff4effc86442e (diff) | |
| download | gdb-8884595866edbe6697a1268f5605b7ffe91efb0a.zip gdb-8884595866edbe6697a1268f5605b7ffe91efb0a.tar.gz gdb-8884595866edbe6697a1268f5605b7ffe91efb0a.tar.bz2 | |
Add support for the M32R2 processor.
Diffstat (limited to 'opcodes/m32r-ibld.c')
| -rw-r--r-- | opcodes/m32r-ibld.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/opcodes/m32r-ibld.c b/opcodes/m32r-ibld.c index 2a8d104..32224da 100644 --- a/opcodes/m32r-ibld.c +++ b/opcodes/m32r-ibld.c @@ -646,12 +646,18 @@ m32r_cgen_insert_operand (cd, opindex, fields, buffer, pc) case M32R_OPERAND_UIMM24 : errmsg = insert_normal (cd, fields->f_uimm24, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer); break; + case M32R_OPERAND_UIMM3 : + errmsg = insert_normal (cd, fields->f_uimm3, 0, 0, 5, 3, 32, total_length, buffer); + break; case M32R_OPERAND_UIMM4 : errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 12, 4, 32, total_length, buffer); break; case M32R_OPERAND_UIMM5 : errmsg = insert_normal (cd, fields->f_uimm5, 0, 0, 11, 5, 32, total_length, buffer); break; + case M32R_OPERAND_UIMM8 : + errmsg = insert_normal (cd, fields->f_uimm8, 0, 0, 8, 8, 32, total_length, buffer); + break; case M32R_OPERAND_ULO16 : errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 16, 16, 32, total_length, buffer); break; @@ -779,12 +785,18 @@ m32r_cgen_extract_operand (cd, opindex, ex_info, insn_value, fields, pc) case M32R_OPERAND_UIMM24 : length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & fields->f_uimm24); break; + case M32R_OPERAND_UIMM3 : + length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_uimm3); + break; case M32R_OPERAND_UIMM4 : length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_uimm4); break; case M32R_OPERAND_UIMM5 : length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 5, 32, total_length, pc, & fields->f_uimm5); break; + case M32R_OPERAND_UIMM8 : + length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_uimm8); + break; case M32R_OPERAND_ULO16 : length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & fields->f_uimm16); break; @@ -889,12 +901,18 @@ m32r_cgen_get_int_operand (cd, opindex, fields) case M32R_OPERAND_UIMM24 : value = fields->f_uimm24; break; + case M32R_OPERAND_UIMM3 : + value = fields->f_uimm3; + break; case M32R_OPERAND_UIMM4 : value = fields->f_uimm4; break; case M32R_OPERAND_UIMM5 : value = fields->f_uimm5; break; + case M32R_OPERAND_UIMM8 : + value = fields->f_uimm8; + break; case M32R_OPERAND_ULO16 : value = fields->f_uimm16; break; @@ -979,12 +997,18 @@ m32r_cgen_get_vma_operand (cd, opindex, fields) case M32R_OPERAND_UIMM24 : value = fields->f_uimm24; break; + case M32R_OPERAND_UIMM3 : + value = fields->f_uimm3; + break; case M32R_OPERAND_UIMM4 : value = fields->f_uimm4; break; case M32R_OPERAND_UIMM5 : value = fields->f_uimm5; break; + case M32R_OPERAND_UIMM8 : + value = fields->f_uimm8; + break; case M32R_OPERAND_ULO16 : value = fields->f_uimm16; break; @@ -1077,12 +1101,18 @@ m32r_cgen_set_int_operand (cd, opindex, fields, value) case M32R_OPERAND_UIMM24 : fields->f_uimm24 = value; break; + case M32R_OPERAND_UIMM3 : + fields->f_uimm3 = value; + break; case M32R_OPERAND_UIMM4 : fields->f_uimm4 = value; break; case M32R_OPERAND_UIMM5 : fields->f_uimm5 = value; break; + case M32R_OPERAND_UIMM8 : + fields->f_uimm8 = value; + break; case M32R_OPERAND_ULO16 : fields->f_uimm16 = value; break; @@ -1163,12 +1193,18 @@ m32r_cgen_set_vma_operand (cd, opindex, fields, value) case M32R_OPERAND_UIMM24 : fields->f_uimm24 = value; break; + case M32R_OPERAND_UIMM3 : + fields->f_uimm3 = value; + break; case M32R_OPERAND_UIMM4 : fields->f_uimm4 = value; break; case M32R_OPERAND_UIMM5 : fields->f_uimm5 = value; break; + case M32R_OPERAND_UIMM8 : + fields->f_uimm8 = value; + break; case M32R_OPERAND_ULO16 : fields->f_uimm16 = value; break; |