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authorDoug Evans <dje@google.com>1998-02-12 03:13:21 +0000
committerDoug Evans <dje@google.com>1998-02-12 03:13:21 +0000
commitab0bd0493ad0dbb544fec8f46b03a0887c594bec (patch)
tree704bb265a3b05386c9228931a03cd0a8e706e3e9 /opcodes/m32r-dis.c
parente0bd6e186c1523ae7c8e9719d4b3bf84c590d76b (diff)
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* cgen-opc.in: New file.
* cgen.sh: Translate @ARCH@. Cat cgen-opc.in into @arch@-opc.c. * Makefile.am (CGENFILES): Add cgen-opc.in. * Makefile.in: Regenerate. * cgen-opc.c (cgen_set_cpu): Delete init of hw list `next' chain. (cgen_hw_lookup): Make result const. * cgen-dis.in (*): Use PTR instead of void *. (print_insn): Delete unused vars `i', `syntax'. * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
Diffstat (limited to 'opcodes/m32r-dis.c')
-rw-r--r--opcodes/m32r-dis.c56
1 files changed, 47 insertions, 9 deletions
diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c
index d0b9733..9b467eb 100644
--- a/opcodes/m32r-dis.c
+++ b/opcodes/m32r-dis.c
@@ -57,7 +57,7 @@ static void print_insn_normal
static int
extract_normal (buf_ctrl, insn_value, attrs, start, length, shift, total_length, valuep)
- void *buf_ctrl;
+ PTR buf_ctrl;
cgen_insn_t insn_value;
unsigned int attrs;
int start, length, shift, total_length;
@@ -94,7 +94,7 @@ extract_normal (buf_ctrl, insn_value, attrs, start, length, shift, total_length,
static void
print_normal (dis_info, value, attrs, pc, length)
- void *dis_info;
+ PTR dis_info;
long value;
unsigned int attrs;
unsigned long pc; /* FIXME: should be bfd_vma */
@@ -121,7 +121,7 @@ print_normal (dis_info, value, attrs, pc, length)
static void
print_keyword (dis_info, keyword_table, value, attrs)
- void *dis_info;
+ PTR dis_info;
CGEN_KEYWORD *keyword_table;
long value;
CGEN_ATTR *attrs;
@@ -197,7 +197,7 @@ my_print_insn (pc, info, buf, buflen)
CGEN_INLINE int
m32r_cgen_extract_operand (opindex, buf_ctrl, insn_value, fields)
int opindex;
- void * buf_ctrl;
+ PTR buf_ctrl;
cgen_insn_t insn_value;
CGEN_FIELDS * fields;
{
@@ -238,6 +238,26 @@ m32r_cgen_extract_operand (opindex, buf_ctrl, insn_value, fields)
case M32R_OPERAND_UIMM16 :
length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_uimm16);
break;
+/* start-sanitize-m32rx */
+ case M32R_OPERAND_IMM1 :
+ length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 15, 1, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_imm1);
+ break;
+/* end-sanitize-m32rx */
+/* start-sanitize-m32rx */
+ case M32R_OPERAND_ACCD :
+ length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 2, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_accd);
+ break;
+/* end-sanitize-m32rx */
+/* start-sanitize-m32rx */
+ case M32R_OPERAND_ACCS :
+ length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 2, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_accs);
+ break;
+/* end-sanitize-m32rx */
+/* start-sanitize-m32rx */
+ case M32R_OPERAND_ACC :
+ length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 8, 1, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_acc);
+ break;
+/* end-sanitize-m32rx */
case M32R_OPERAND_HI16 :
length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_hi16);
break;
@@ -327,6 +347,26 @@ m32r_cgen_print_operand (opindex, info, fields, attrs, pc, length)
case M32R_OPERAND_UIMM16 :
print_normal (info, fields->f_uimm16, 0|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
break;
+/* start-sanitize-m32rx */
+ case M32R_OPERAND_IMM1 :
+ print_normal (info, fields->f_imm1, 0|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
+ break;
+/* end-sanitize-m32rx */
+/* start-sanitize-m32rx */
+ case M32R_OPERAND_ACCD :
+ print_keyword (info, & m32r_cgen_opval_h_accums, fields->f_accd, 0|(1<<CGEN_OPERAND_UNSIGNED));
+ break;
+/* end-sanitize-m32rx */
+/* start-sanitize-m32rx */
+ case M32R_OPERAND_ACCS :
+ print_keyword (info, & m32r_cgen_opval_h_accums, fields->f_accs, 0|(1<<CGEN_OPERAND_UNSIGNED));
+ break;
+/* end-sanitize-m32rx */
+/* start-sanitize-m32rx */
+ case M32R_OPERAND_ACC :
+ print_keyword (info, & m32r_cgen_opval_h_accums, fields->f_acc, 0|(1<<CGEN_OPERAND_UNSIGNED));
+ break;
+/* end-sanitize-m32rx */
case M32R_OPERAND_HI16 :
print_normal (info, fields->f_hi16, 0|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
break;
@@ -389,7 +429,7 @@ m32r_cgen_init_dis (mach, endian)
static int
extract_insn_normal (insn, buf_ctrl, insn_value, fields)
const CGEN_INSN *insn;
- void *buf_ctrl;
+ PTR buf_ctrl;
cgen_insn_t insn_value;
CGEN_FIELDS *fields;
{
@@ -419,13 +459,13 @@ extract_insn_normal (insn, buf_ctrl, insn_value, fields)
/* Default insn printer.
- DIS_INFO is defined as `void *' so the disassembler needn't know anything
+ DIS_INFO is defined as `PTR' so the disassembler needn't know anything
about disassemble_info.
*/
static void
print_insn_normal (dis_info, insn, fields, pc, length)
- void *dis_info;
+ PTR dis_info;
const CGEN_INSN *insn;
CGEN_FIELDS *fields;
bfd_vma pc;
@@ -473,7 +513,6 @@ print_insn (pc, info, buf, buflen)
char *buf;
int buflen;
{
- int i;
unsigned long insn_value;
const CGEN_INSN_LIST *insn_list;
@@ -499,7 +538,6 @@ print_insn (pc, info, buf, buflen)
while (insn_list != NULL)
{
const CGEN_INSN *insn = insn_list->insn;
- const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
CGEN_FIELDS fields;
int length;