aboutsummaryrefslogtreecommitdiff
path: root/opcodes/m32r-asm.c
diff options
context:
space:
mode:
authorNick Clifton <nickc@redhat.com>2003-12-03 17:38:48 +0000
committerNick Clifton <nickc@redhat.com>2003-12-03 17:38:48 +0000
commit8884595866edbe6697a1268f5605b7ffe91efb0a (patch)
tree1710b68cb96d5cba8449135a5113d5c9a6a8c62f /opcodes/m32r-asm.c
parentf8fc3443814cb6f315680a7fb34ff4effc86442e (diff)
downloadgdb-8884595866edbe6697a1268f5605b7ffe91efb0a.zip
gdb-8884595866edbe6697a1268f5605b7ffe91efb0a.tar.gz
gdb-8884595866edbe6697a1268f5605b7ffe91efb0a.tar.bz2
Add support for the M32R2 processor.
Diffstat (limited to 'opcodes/m32r-asm.c')
-rw-r--r--opcodes/m32r-asm.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c
index a8c9485..8c2cc81 100644
--- a/opcodes/m32r-asm.c
+++ b/opcodes/m32r-asm.c
@@ -147,7 +147,11 @@ parse_slo16 (cd, strp, opindex, valuep)
++*strp;
if (errmsg == NULL
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
- value &= 0xffff;
+ {
+ value &= 0xffff;
+ if (value & 0x8000)
+ value |= 0xffff0000;
+ }
*valuep = value;
return errmsg;
}
@@ -310,12 +314,18 @@ m32r_cgen_parse_operand (cd, opindex, strp, fields)
fields->f_uimm24 = value;
}
break;
+ case M32R_OPERAND_UIMM3 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM3, &fields->f_uimm3);
+ break;
case M32R_OPERAND_UIMM4 :
errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, &fields->f_uimm4);
break;
case M32R_OPERAND_UIMM5 :
errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, &fields->f_uimm5);
break;
+ case M32R_OPERAND_UIMM8 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM8, &fields->f_uimm8);
+ break;
case M32R_OPERAND_ULO16 :
errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, &fields->f_uimm16);
break;