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author | H.J. Lu <hjl.tools@gmail.com> | 2012-09-04 13:52:06 +0000 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2012-09-04 13:52:06 +0000 |
commit | b3e14edafcdc558d724452ee5b803ff096c32d0f (patch) | |
tree | 44a3814f838c0bdf05c27616bfc7828962d33eb9 /opcodes/ia64-gen.c | |
parent | c6d8cab4ac5c906937dcd4f884e65fb4d1052381 (diff) | |
download | gdb-b3e14edafcdc558d724452ee5b803ff096c32d0f.zip gdb-b3e14edafcdc558d724452ee5b803ff096c32d0f.tar.gz gdb-b3e14edafcdc558d724452ee5b803ff096c32d0f.tar.bz2 |
Add Intel Itanium Series 9500 support
bfd/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* cpu-ia64-opc.c (ins_cnt6a): New function.
(ext_cnt6a): Ditto.
(ins_strd5b): Ditto.
(ext_strd5b): Ditto.
(elf64_ia64_operands): Add new operand types.
gas/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* config/tc-ia64.c (reg_symbol): Add a new register.
(indirect_reg): Ditto.
(pseudo_func): Add new symbolic constants.
(operand_match): Add new operand types recognition.
(operand_insn): Add new register recognition.
(md_begin): Add new register definition.
(specify_resource): Add new register recognition.
gas/testsuite/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* gas/testsuite/gas/ia64/psn.d: New file.
* gas/testsuite/gas/ia64/psn.s: New file.
* gas/testsuite/gas/ia64/ia64.exp: Add new testcase.
* gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests.
* gas/testsuite/gas/ia64/opc-m.d: Ditto.
include/opcode/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64.h (ia64_opnd): Add new operand types.
opcodes/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64-asmtab.h (completer_index): Extend bitfield to full uint.
* ia64-gen.c: Promote completer index type to longlong.
(irf_operand): Add new register recognition.
(in_iclass_mov_x): Add an entry for the new mov_* instruction type.
(lookup_specifier): Add new resource recognition.
(insert_bit_table_ent): Relax abort condition according to the
changed completer index type.
(print_dis_table): Fix printf format for completer index.
* ia64-ic.tbl: Add a new instruction class.
* ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
* ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
* ia64-opc.h: Define short names for new operand types.
* ia64-raw.tbl: Add new RAW resource for DAHR register.
* ia64-waw.tbl: Add new WAW resource for DAHR register.
* ia64-asmtab.c: Regenerate.
Diffstat (limited to 'opcodes/ia64-gen.c')
-rw-r--r-- | opcodes/ia64-gen.c | 35 |
1 files changed, 23 insertions, 12 deletions
diff --git a/opcodes/ia64-gen.c b/opcodes/ia64-gen.c index f6deca1..042c0fd 100644 --- a/opcodes/ia64-gen.c +++ b/opcodes/ia64-gen.c @@ -69,6 +69,7 @@ int debug = 0; #define NELEMS(a) (sizeof (a) / sizeof ((a)[0])) #define tmalloc(X) (X *) xmalloc (sizeof (X)) +typedef unsigned long long ci_t; /* The main opcode table entry. Each entry is a unique combination of name and flags (no two entries in the table compare as being equal via opcodes_eq). */ @@ -146,7 +147,7 @@ struct disent int priority; /* The completer_index value for this entry. */ - int completer_index; + ci_t completer_index; /* How many other entries share this decode. */ int nextcnt; @@ -290,11 +291,11 @@ static void shrink (struct ia64_opcode *); static void print_version (void); static void usage (FILE *, int); static void finish_distable (void); -static void insert_bit_table_ent (struct bittree *, int, ia64_insn, ia64_insn, int, int, int); -static void add_dis_entry (struct bittree *, ia64_insn, ia64_insn, int, struct completer_entry *, int); +static void insert_bit_table_ent (struct bittree *, int, ia64_insn, ia64_insn, int, int, ci_t); +static void add_dis_entry (struct bittree *, ia64_insn, ia64_insn, int, struct completer_entry *, ci_t); static void compact_distree (struct bittree *); static struct bittree * make_bittree_entry (void); -static struct disent * add_dis_table_ent (struct disent *, int, int, int); +static struct disent * add_dis_table_ent (struct disent *, int, int, ci_t); static void @@ -902,12 +903,13 @@ irf_operand (int op, const char *field) || (op == IA64_OPND_PMC_R3 && strstr (field, "pmc")) || (op == IA64_OPND_PMD_R3 && strstr (field, "pmd")) || (op == IA64_OPND_MSR_R3 && strstr (field, "msr")) - || (op == IA64_OPND_CPUID_R3 && strstr (field, "cpuid"))); + || (op == IA64_OPND_CPUID_R3 && strstr (field, "cpuid")) + || (op == IA64_OPND_DAHR_R3 && strstr (field, "dahr"))); } } -/* Handle mov_ar, mov_br, mov_cr, mov_indirect, mov_ip, mov_pr, mov_psr, and - mov_um insn classes. */ +/* Handle mov_ar, mov_br, mov_cr, move_dahr, mov_indirect, mov_ip, mov_pr, + * mov_psr, and mov_um insn classes. */ static int in_iclass_mov_x (struct ia64_opcode *idesc, struct iclass *ic, const char *format, const char *field) @@ -965,6 +967,13 @@ in_iclass_mov_x (struct ia64_opcode *idesc, struct iclass *ic, return strstr (format, "M33") != NULL; } break; + case 'd': + { + int m50 = plain_mov && idesc->operands[0] == IA64_OPND_DAHR3; + if (m50) + return strstr (format, "M50") != NULL; + } + break; case 'i': if (ic->name[5] == 'n') { @@ -1441,6 +1450,8 @@ lookup_specifier (const char *name) return IA64_RS_CR_LRR; if (strstr (name, "CR%") != NULL) return IA64_RS_CR; + if (strstr (name, "DAHR%, % in 0") != NULL) + return IA64_RS_DAHR; if (strstr (name, "FR%, % in 0") != NULL) return IA64_RS_FR; if (strstr (name, "FR%, % in 2") != NULL) @@ -1723,7 +1734,7 @@ make_bittree_entry (void) static struct disent * add_dis_table_ent (struct disent *which, int insn, int order, - int completer_index) + ci_t completer_index) { int ci = 0; struct disent *ent; @@ -1776,7 +1787,7 @@ finish_distable (void) static void insert_bit_table_ent (struct bittree *curr_ent, int bit, ia64_insn opcode, ia64_insn mask, int opcodenum, int order, - int completer_index) + ci_t completer_index) { ia64_insn m; int b; @@ -1810,9 +1821,9 @@ insert_bit_table_ent (struct bittree *curr_ent, int bit, ia64_insn opcode, static void add_dis_entry (struct bittree *first, ia64_insn opcode, ia64_insn mask, - int opcodenum, struct completer_entry *ent, int completer_index) + int opcodenum, struct completer_entry *ent, ci_t completer_index) { - if (completer_index & (1 << 20)) + if (completer_index & ((ci_t)1 << 32) ) abort (); while (ent != NULL) @@ -2131,7 +2142,7 @@ print_dis_table (void) while (ent != NULL) { - printf ("{ 0x%x, %d, %d, %d },\n", ent->completer_index, + printf ("{ 0x%lx, %d, %d, %d },\n", ( long ) ent->completer_index, ent->insn, (ent->nexte != NULL ? 1 : 0), ent->priority); ent = ent->nexte; |