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| author | H.J. Lu <hjl.tools@gmail.com> | 2019-05-28 10:05:28 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2019-05-28 10:05:44 -0700 |
| commit | a2f4b66c9eb5210f8ef6038d7194af1e5f314f97 (patch) | |
| tree | 36db3b000a851d9680704b36f17ecf81df19fd72 /opcodes/i386-tbl.h | |
| parent | c0e70c624fc7d89f5cf281350692de89a063786f (diff) | |
| download | gdb-a2f4b66c9eb5210f8ef6038d7194af1e5f314f97.zip gdb-a2f4b66c9eb5210f8ef6038d7194af1e5f314f97.tar.gz gdb-a2f4b66c9eb5210f8ef6038d7194af1e5f314f97.tar.bz2 | |
x86: Add CheckRegSize to AVX512_BF16 instructions with Disp8ShiftVL
For AVX512 instructions with Disp8ShiftVL and Broadcast, we may need to
add CheckRegSize to check if broadcast matches the destination register
size.
gas/
PR gas/24625
* testsuite/gas/i386/inval-avx512f.s: Add tests for AVX512_BF16
instructions with invalid broadcast.
* testsuite/gas/i386/x86-64-inval-avx512f.s: Likewise.
* testsuite/gas/i386/inval-avx512f.l: Updated.
* testsuite/gas/i386/x86-64-inval-avx512f.l: Likewise.
opcodes/
PR gas/24625
* i386-opc.tbl: Add CheckRegSize to AVX512_BF16 instructions with
Disp8ShiftVL.
* i386-tbl.h: Regenerated.
Diffstat (limited to 'opcodes/i386-tbl.h')
| -rw-r--r-- | opcodes/i386-tbl.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index ab251c6..5e1611e 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -67651,7 +67651,7 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 3, 3, 0, 0, 7, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, @@ -67750,7 +67750,7 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, + { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 3, 3, 0, 0, 7, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, |