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| author | Jan Beulich <jbeulich@novell.com> | 2017-12-18 09:35:01 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2017-12-18 09:35:01 +0100 |
| commit | ca0d63fe0703ed36af1a7bda6097958805895b3a (patch) | |
| tree | b3f659fb2dbb588705e9505642c7fe1e83294997 /opcodes/i386-reg.tbl | |
| parent | dc821c5f9ae5208ad1ec438718f75e224f856deb (diff) | |
| download | gdb-ca0d63fe0703ed36af1a7bda6097958805895b3a.zip gdb-ca0d63fe0703ed36af1a7bda6097958805895b3a.tar.gz gdb-ca0d63fe0703ed36af1a7bda6097958805895b3a.tar.bz2 | |
x86: drop FloatReg and FloatAcc
Express them as Reg|Tbyte and Acc|Tbyte respectively.
Diffstat (limited to 'opcodes/i386-reg.tbl')
| -rw-r--r-- | opcodes/i386-reg.tbl | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/i386-reg.tbl b/opcodes/i386-reg.tbl index 65b09be..db7baa0 100644 --- a/opcodes/i386-reg.tbl +++ b/opcodes/i386-reg.tbl @@ -19,7 +19,7 @@ // 02110-1301, USA. // Make %st first as we test for it. -st, FloatReg|FloatAcc, 0, 0, 11, 33 +st, FloatReg|Acc, 0, 0, 11, 33 // 8 bit regs al, Reg8|Acc, 0, 0, Dw2Inval, Dw2Inval cl, Reg8|ShiftCount, 0, 1, Dw2Inval, Dw2Inval @@ -292,7 +292,7 @@ eip, BaseIndex, RegRex64, RegEip, 8, Dw2Inval riz, BaseIndex, RegRex64, RegRiz, Dw2Inval, Dw2Inval eiz, BaseIndex, 0, RegEiz, Dw2Inval, Dw2Inval // fp regs. -st(0), FloatReg|FloatAcc, 0, 0, 11, 33 +st(0), FloatReg|Acc, 0, 0, 11, 33 st(1), FloatReg, 0, 1, 12, 34 st(2), FloatReg, 0, 2, 13, 35 st(3), FloatReg, 0, 3, 14, 36 |