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authorIlya Tocar <ilya.tocar@intel.com>2014-11-17 14:19:41 +0300
committerH.J. Lu <hjl.tools@gmail.com>2014-11-17 05:56:37 -0800
commitc5e7287a1a245a2043352e0db9c731fb7e31a90f (patch)
tree39d2c835943b95a01a9cb552d993ace4554091dc /opcodes/i386-opc.tbl
parenta267f3ad3f8c3f76f46ed006ac11a88426414339 (diff)
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Add clwb instruction
gas/ * config/tc-i386.c (cpu_arch): Add .clwb. * doc/c-i386.texi: Document it. opcodes/ * i386-dis.c (PREFIX enum): Add PREFIX_0FAE_REG_6. (prefix_table): Add clwb. * i386-gen.c (cpu_flag_init): Add CPU_CLWB_FLAGS. (cpu_flags): Add CpuCLWB. * i386-opc.h (enum): Add CpuCLWB. (i386_cpu_flags): Add cpuclwb. * i386-opc.tbl: Add clwb. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. gas/testsuite/ * gas/i386/i386.exp: Run new tests. * gas/i386/clwb-intel.d: New file. * gas/i386/clwb.d: Likewise. * gas/i386/clwb.s: Likewise. * gas/i386/x86-64-clwb-intel.d: Likewise. * gas/i386/x86-64-clwb.d: Likewise. * gas/i386/x86-64-clwb.s: Likewise.
Diffstat (limited to 'opcodes/i386-opc.tbl')
-rw-r--r--opcodes/i386-opc.tbl6
1 files changed, 6 insertions, 0 deletions
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 254f3b4..08c8a67 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -5882,3 +5882,9 @@ vreducess, 4, 0x6657, None, 1, CpuAVX512DQ, Modrm|EVex=4|Masking=3|VexOpcode=2|V
vreducess, 5, 0x6657, None, 1, CpuAVX512DQ, Modrm|EVex=4|Masking=3|VexOpcode=2|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, Imm8, RegXMM, RegXMM, RegXMM }
// AVX512DQ instructions end.
+
+// CLWB instructions.
+
+clwb, 1, 0x660fae, 0x6, 2, CpuCLWB, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Anysize|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
+
+// CLWB instructions end.