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author | Cui,Lili <lili.cui@intel.com> | 2020-04-07 13:59:50 +0800 |
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committer | Cui,Lili <lili.cui@intel.com> | 2020-04-07 13:59:50 +0800 |
commit | bb651e8b7fc7904b06031a665138e9e6ae79adf3 (patch) | |
tree | a13f7b941e7a5a9e4a81aaae09008a3ff53e8a01 /opcodes/i386-opc.tbl | |
parent | f4a220077b03af3a1f905b7dc6dc84c0a06d582f (diff) | |
download | gdb-bb651e8b7fc7904b06031a665138e9e6ae79adf3.zip gdb-bb651e8b7fc7904b06031a665138e9e6ae79adf3.tar.gz gdb-bb651e8b7fc7904b06031a665138e9e6ae79adf3.tar.bz2 |
Add support for intel TSXLDTRK instructions$
gas/
* config/tc-i386.c (cpu_arch): Add .TSXLDTRK.
(cpu_noarch): Likewise.
* doc/c-i386.texi: Document TSXLDTRK.
* testsuite/gas/i386/i386.exp: Run TSXLDTRK tests.
* testsuite/gas/i386/tsxldtrk.d: Likewise.
* testsuite/gas/i386/tsxldtrk.s: Likewise.
* testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
opcodes/
* i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
(prefix_table): New instructions (see prefixes above).
(rm_table): Likewise.
* i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
CPU_ANY_TSXLDTRK_FLAGS.
(cpu_flags): Add CpuTSXLDTRK.
* i386-opc.h (enum): Add CpuTSXLDTRK.
(i386_cpu_flags): Add cputsxldtrk.
* i386-opc.tbl: Add XSUSPLDTRK insns.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-opc.tbl')
-rw-r--r-- | opcodes/i386-opc.tbl | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 2d1b980..92cc9ba 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -4082,3 +4082,10 @@ rdpru, 0, 0x0f01fd, None, 3, CpuRDPRU, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|N serialize, 0, 0x0f01e8, None, 3, CpuSERIALIZE, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } // SERIALIZE instruction end. + +// TSXLDTRK instructions. + +xsuspldtrk, 0, 0xf20f01e8, None, 3, CpuTSXLDTRK, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } +xresldtrk, 0, 0xf20f01e9, None, 3, CpuTSXLDTRK, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } + +// TSXLDTRK instructions end. |