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authorLiliCui <lili.cui@intel.com>2020-03-06 14:38:15 +0800
committerH.J. Lu <hjl.tools@gmail.com>2020-04-02 05:48:36 -0700
commit4b27d27c07a9514d5f6d0876f659a32378fb4801 (patch)
treeda3b088be2f145fc465f8bdc44d3ce217bed8408 /opcodes/i386-opc.tbl
parent516231b7c7278e4e5a726cff1f798beb4bbce73c (diff)
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Add support for intel SERIALIZE instruction
gas/ * config/tc-i386.c (cpu_arch): Add .serialize. (cpu_noarch): Likewise. * doc/c-i386.texi: Document serialize. * testsuite/gas/i386/i386.exp: Run serialize tests * testsuite/gas/i386/serialize.d: Likewise. * testsuite/gas/i386/x86-64-serialize.d: Likewise. * testsuite/gas/i386/serialize.s: Likewise. opcodes/ * i386-dis.c (prefix_table): New instructions serialize. * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS, CPU_ANY_SERIALIZE_FLAGS. (cpu_flags): Add CpuSERIALIZE. * i386-opc.h (enum): Add CpuSERIALIZE. (i386_cpu_flags): Add cpuserialize. * i386-opc.tbl: Add SERIALIZE insns. * i386-init.h: Regenerate. * i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-opc.tbl')
-rw-r--r--opcodes/i386-opc.tbl6
1 files changed, 6 insertions, 0 deletions
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 206447d..2d1b980 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -4076,3 +4076,9 @@ mcommit, 0, 0xf30f01fa, None, 3, CpuMCOMMIT, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_
rdpru, 0, 0x0f01fd, None, 3, CpuRDPRU, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
// RDPRU instruction end
+
+// SERIALIZE instruction.
+
+serialize, 0, 0x0f01e8, None, 3, CpuSERIALIZE, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
+
+// SERIALIZE instruction end.