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authorJan Beulich <jbeulich@novell.com>2017-11-13 12:20:30 +0100
committerJan Beulich <jbeulich@suse.com>2017-11-13 12:20:30 +0100
commit1187cf29b1f77b4d806c3bbe1fcd86fc7387eeb9 (patch)
tree97b0a0f667d613adaa484b51bc6e3a20b00b34d7 /opcodes/i386-opc.tbl
parent2abc2bec4d8c241c1cd3972b64162407128b4daf (diff)
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x86/Intel: don't mistake riz/eiz as base register
Just like we make rsp/esp a base register even if it comes second, make riz/eiz an index register even if it comes first.
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