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authorRoland McGrath <roland@gnu.org>2012-06-22 21:54:06 +0000
committerRoland McGrath <roland@gnu.org>2012-06-22 21:54:06 +0000
commitfe13e45b9a7ffd7f0f0f3c88fd76c6be6fabbc66 (patch)
treeac59244c13abdc5e5f941c19c7473e6713336659 /opcodes/i386-opc.tbl
parent352b3eda56110eb857612d07956b155ff0ee0961 (diff)
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gas/
* NEWS: Mention 'rep ret' too. gas/testsuite/ * gas/i386/rep-ret.d: New file. * gas/i386/rep-ret.s: New file. * gas/i386/i386.exp: Add the new test. opcodes/ * i386-opc.tbl: Add RepPrefixOk to ret. * i386-tbl.h: Regenerate.
Diffstat (limited to 'opcodes/i386-opc.tbl')
-rw-r--r--opcodes/i386-opc.tbl8
1 files changed, 4 insertions, 4 deletions
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index b545730..7de61a7 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -340,10 +340,10 @@ jmp, 1, 0xff, 0x5, 1, 0, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf, { Dword|
ljmp, 2, 0xea, None, 1, CpuNo64, JumpInterSegment|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm16, Imm16|Imm32 }
ljmp, 1, 0xff, 0x5, 1, 0, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|JumpAbsolute }
-ret, 0, 0xc3, None, 1, CpuNo64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
-ret, 1, 0xc2, None, 1, CpuNo64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm16 }
-ret, 0, 0xc3, None, 1, Cpu64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64, { 0 }
-ret, 1, 0xc2, None, 1, Cpu64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64, { Imm16 }
+ret, 0, 0xc3, None, 1, CpuNo64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf|RepPrefixOk, { 0 }
+ret, 1, 0xc2, None, 1, CpuNo64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf|RepPrefixOk, { Imm16 }
+ret, 0, 0xc3, None, 1, Cpu64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|RepPrefixOk, { 0 }
+ret, 1, 0xc2, None, 1, Cpu64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64|RepPrefixOk, { Imm16 }
lret, 0, 0xcb, None, 1, 0, DefaultSize|No_bSuf|No_sSuf|No_ldSuf, { 0 }
lret, 1, 0xca, None, 1, 0, DefaultSize|No_bSuf|No_sSuf|No_ldSuf, { Imm16 }
// Intel Syntax.