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| author | H.J. Lu <hjl.tools@gmail.com> | 2009-02-23 20:41:46 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2009-02-23 20:41:46 +0000 |
| commit | 4c664d7bf7005e368a8ee5183ee018924acf0f9b (patch) | |
| tree | 5b377fb8113b8cfcf72182124ceb80c2b1418269 /opcodes/i386-opc.tbl | |
| parent | 7bcbeb0f1cba175ad4b8b3990fd1a0e81a4dcefd (diff) | |
| download | gdb-4c664d7bf7005e368a8ee5183ee018924acf0f9b.zip gdb-4c664d7bf7005e368a8ee5183ee018924acf0f9b.tar.gz gdb-4c664d7bf7005e368a8ee5183ee018924acf0f9b.tar.bz2 | |
gas/
2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (vex_imm4): Removed.
(VEX_check_operands): Likewise.
(match_template): Updated.
opcodes/
2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
(operand_types): Remove Vex_Imm4.
* i386-opc.h (Vex_Imm4): Removed.
(OTMax): Updated.
(i386_operand_type): Remove vex_imm4.
* i386-opc.tbl: Remove Vex_Imm4 comments.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-opc.tbl')
| -rw-r--r-- | opcodes/i386-opc.tbl | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 5cb5013..edd1fde 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -1767,9 +1767,6 @@ pclmulhqhqdq, 2, 0x660f3a44, 0x11, 3, CpuPCLMUL, Modrm|IgnoreSize|No_bSuf|No_wSu // AVX instructions. -// We add Imm8 to Vex_Imm4. We use Imm8 to indicate that the operand -// is an immediate. We will check if its value will fit 4 bits. - vaddpd, 3, 0x6658, None, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM } vaddpd, 3, 0x6658, None, 1, CpuAVX, Modrm|Vex|Vex0F|Vex256|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM } vaddps, 3, 0x58, None, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM } |