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| author | H.J. Lu <hjl.tools@gmail.com> | 2010-08-06 01:03:17 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2010-08-06 01:03:17 +0000 |
| commit | 92d4d42efb6cc8fb3ff82ce562edb1cf383a6199 (patch) | |
| tree | fd5c3f325dc391acfd0693efde2e4495bc782a5b /opcodes/i386-opc.tbl | |
| parent | b414985b9e1caddcc670dd67e6142c0e3c282099 (diff) | |
| download | gdb-92d4d42efb6cc8fb3ff82ce562edb1cf383a6199.zip gdb-92d4d42efb6cc8fb3ff82ce562edb1cf383a6199.tar.gz gdb-92d4d42efb6cc8fb3ff82ce562edb1cf383a6199.tar.bz2 | |
Add Cpu186 to ud1/ud2/ud2a/ud2b.
2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
* i386-tbl.h: Regenerated.
Diffstat (limited to 'opcodes/i386-opc.tbl')
| -rw-r--r-- | opcodes/i386-opc.tbl | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 4ebd2b1..4a3dc0b 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -853,13 +853,13 @@ fxrstor, 1, 0xfae, 0x1, 2, Cpu686, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSu fxrstor64, 1, 0xfae, 0x1, 2, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|Rex64, { Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S } rdpmc, 0, 0xf33, None, 2, Cpu686, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } // official undefined instr. -ud2, 0, 0xf0b, None, 2, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } +ud2, 0, 0xf0b, None, 2, Cpu186, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } // alias for ud2 -ud2a, 0, 0xf0b, None, 2, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } +ud2a, 0, 0xf0b, None, 2, Cpu186, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } // 2nd. official undefined instr. -ud1, 0, 0xfb9, None, 2, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } +ud1, 0, 0xfb9, None, 2, Cpu186, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } // alias for ud1 -ud2b, 0, 0xfb9, None, 2, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } +ud2b, 0, 0xfb9, None, 2, Cpu186, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } cmovo, 2, 0xf40, None, 2, Cpu686, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 } cmovno, 2, 0xf41, None, 2, Cpu686, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 } |