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| author | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2018-04-25 17:02:06 +0200 |
|---|---|---|
| committer | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2018-04-26 23:34:04 +0200 |
| commit | a914a7c95895161c99533d5919b8504b37ea54a0 (patch) | |
| tree | e2ef68914a5cd764b89865190ce40a0c3e899b28 /opcodes/i386-opc.h | |
| parent | 0df8ad28f0f727fab3a696d6c98b9a8a77ee1024 (diff) | |
| download | gdb-a914a7c95895161c99533d5919b8504b37ea54a0.zip gdb-a914a7c95895161c99533d5919b8504b37ea54a0.tar.gz gdb-a914a7c95895161c99533d5919b8504b37ea54a0.tar.bz2 | |
Enable Intel MOVDIRI, MOVDIR64B instructions.
gas/
* config/tc-i386.c (cpu_arch): Add .movdir, .movdir64b.
(cpu_noarch): Likewise.
(process_suffix): Add check for register size.
* doc/c-i386.texi: Document movdiri, movdir64b.
* testsuite/gas/i386/i386.exp: Run MOVDIR{I,64B} tests.
* testsuite/gas/i386/movdir-intel.d: New test.
* testsuite/gas/i386/movdir.d: Likewise.
* testsuite/gas/i386/movdir.s: Likewise.
* testsuite/gas/i386/movdir64b-reg.s: Likewise.
* testsuite/gas/i386/movdir64b-reg.l: Likewise.
* testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
* testsuite/gas/i386/x86-64-movdir.d: Likewise.
* testsuite/gas/i386/x86-64-movdir.s: Likewise.
* testsuite/gas/i386/x86-64-movdir64b-reg.s: Likewise.
* testsuite/gas/i386/x86-64-movdir64b-reg.l: Likewise.
opcodes/
* i386-dis.c (enum): Add PREFIX_0F38F8, PREFIX_0F38F9.
(prefix_table): New instructions (see prefix above).
Add Gva macro and handling in OP_G.
* i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
CPU_MOVDIR64B_FLAGS.
(cpu_flags): Likewise.
(opcode_modifiers): Add AddrPrefixOpReg.
(i386_opcode_modifier): Likewise.
* i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
(i386_cpu_flags): Likewise.
* i386-opc.tbl: Add movidir{i,64b}.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-opc.h')
| -rw-r--r-- | opcodes/i386-opc.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 58abea6..eddd08b 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -231,6 +231,20 @@ enum CpuWAITPKG, /* CLDEMOTE instruction required */ CpuCLDEMOTE, + /* MOVDIRI instruction support required */ + CpuMOVDIRI, + /* MOVDIRR64B instruction required */ + CpuMOVDIR64B, + /* MMX register support required */ + CpuRegMMX, + /* XMM register support required */ + CpuRegXMM, + /* YMM register support required */ + CpuRegYMM, + /* ZMM register support required */ + CpuRegZMM, + /* Mask register support required */ + CpuRegMask, /* 64bit support required */ Cpu64, /* Not supported in the 64bit mode */ @@ -354,6 +368,13 @@ typedef union i386_cpu_flags unsigned int cpupconfig:1; unsigned int cpuwaitpkg:1; unsigned int cpucldemote:1; + unsigned int cpumovdiri:1; + unsigned int cpumovdir64b:1; + unsigned int cpuregmmx:1; + unsigned int cpuregxmm:1; + unsigned int cpuregymm:1; + unsigned int cpuregzmm:1; + unsigned int cpuregmask:1; unsigned int cpu64:1; unsigned int cpuno64:1; #ifdef CpuUnused @@ -447,6 +468,8 @@ enum ToQword, /* Address prefix changes operand 0 */ AddrPrefixOp0, + /* Address prefix changes register operand */ + AddrPrefixOpReg, /* opcode is a prefix */ IsPrefix, /* instruction has extension in 8 bit imm */ @@ -628,6 +651,7 @@ typedef struct i386_opcode_modifier unsigned int todword:1; unsigned int toqword:1; unsigned int addrprefixop0:1; + unsigned int addrprefixopreg:1; unsigned int isprefix:1; unsigned int immext:1; unsigned int norex64:1; |