diff options
author | H.J. Lu <hjl.tools@gmail.com> | 2009-12-16 02:10:45 +0000 |
---|---|---|
committer | H.J. Lu <hjl.tools@gmail.com> | 2009-12-16 02:10:45 +0000 |
commit | 1ef99a7be96373a4018f793730e9366172510bb7 (patch) | |
tree | dd3c7c4dc6b1faca75e91e854f9bf9ffa7992bbc /opcodes/i386-opc.h | |
parent | 0175442dfa8f5f0f3e14cad5347d922bbe9f6b7d (diff) | |
download | gdb-1ef99a7be96373a4018f793730e9366172510bb7.zip gdb-1ef99a7be96373a4018f793730e9366172510bb7.tar.gz gdb-1ef99a7be96373a4018f793730e9366172510bb7.tar.bz2 |
Remove VexW0 and VexW1. Add VexW.
gas/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1
with vexw.
(build_modrm_byte): Likewise.
opcodes/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1. Add
VexW.
* i386-opc.h (VexW0): Removed.
(VexW1): Likewise.
(VEXW0): New.
(VEXW1): Likewise.
(VexW): Likewise.
(i386_opcode_modifier): Remove vexw0 and vexw1. Add vexw.
* i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
Vex=2.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-opc.h')
-rw-r--r-- | opcodes/i386-opc.h | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 3b0f2c6..2bc07b0 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -286,10 +286,14 @@ enum /* insn has VEX NDD. Register destination is encoded in Vex prefix and one of the operands can access a memory location. */ VexLWP, - /* insn has VEX W0. */ - VexW0, - /* insn has VEX W1. */ - VexW1, + /* How the VEX.W bit is used: + 0: Set by the REX.W bit. + 1: VEX.W0. Should always be 0. + 2: VEX.W1. Should always be 1. + */ +#define VEXW0 1 +#define VEXW1 2 + VexW, /* insn has VEX 0x0F opcode prefix. */ Vex0F, /* insn has VEX 0x0F38 opcode prefix. */ @@ -368,8 +372,7 @@ typedef struct i386_opcode_modifier unsigned int vexnds:1; unsigned int vexndd:1; unsigned int vexlwp:1; - unsigned int vexw0:1; - unsigned int vexw1:1; + unsigned int vexw:2; unsigned int vex0f:1; unsigned int vex0f38:1; unsigned int vex0f3a:1; |