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authorH.J. Lu <hjl.tools@gmail.com>2018-02-27 07:36:33 -0800
committerH.J. Lu <hjl.tools@gmail.com>2018-02-27 07:36:43 -0800
commitb6f8c7c45229a8a5405079e586bfbaad396d2cbe (patch)
treeea40712191018121299a9619eec8534608a08a1d /opcodes/i386-opc.h
parentbc7c0509f28d3a448adf4c2da335d0251ef69892 (diff)
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x86: Add -O[2|s] assembler command-line options
On x86, some instructions have alternate shorter encodings: 1. When the upper 32 bits of destination registers of andq $imm31, %r64 testq $imm31, %r64 xorq %r64, %r64 subq %r64, %r64 known to be zero, we can encode them without the REX_W bit: andl $imm31, %r32 testl $imm31, %r32 xorl %r32, %r32 subl %r32, %r32 This optimization is enabled with -O, -O2 and -Os. 2. Since 0xb0 mov with 32-bit destination registers zero-extends 32-bit immediate to 64-bit destination register, we can use it to encode 64-bit mov with 32-bit immediates. This optimization is enabled with -O, -O2 and -Os. 3. Since the upper bits of destination registers of VEX128 and EVEX128 instructions are extended to zero, if all bits of destination registers of AVX256 or AVX512 instructions are zero, we can use VEX128 or EVEX128 encoding to encode AVX256 or AVX512 instructions. When 2 source registers are identical, AVX256 and AVX512 andn and xor instructions: VOP %reg, %reg, %dest_reg can be encoded with VOP128 %reg, %reg, %dest_reg This optimization is enabled with -O2 and -Os. 4. 16-bit, 32-bit and 64-bit register tests with immediate may be encoded as 8-bit register test with immediate. This optimization is enabled with -Os. This patch does: 1. Add {nooptimize} pseudo prefix to disable instruction size optimization. 2. Add optimize to i386_opcode_modifier to tell assembler that encoding of an instruction may be optimized. gas/ PR gas/22871 * NEWS: Mention -O[2|s]. * config/tc-i386.c (_i386_insn): Add no_optimize. (optimize): New. (optimize_for_space): Likewise. (fits_in_imm7): New function. (fits_in_imm31): Likewise. (optimize_encoding): Likewise. (md_assemble): Call optimize_encoding to optimize encoding. (parse_insn): Handle {nooptimize}. (md_shortopts): Append "O::". (md_parse_option): Handle -On. * doc/c-i386.texi: Document -O0, -O, -O1, -O2 and -Os as well as {nooptimize}. * testsuite/gas/cfi/cfi-x86_64.d: Pass -O0 to assembler. * testsuite/gas/i386/ilp32/cfi/cfi-x86_64.d: Likewise. * testsuite/gas/i386/i386.exp: Run optimize-1, optimize-2, optimize-3, x86-64-optimize-1, x86-64-optimize-2, x86-64-optimize-3 and x86-64-optimize-4. * testsuite/gas/i386/optimize-1.d: New file. * testsuite/gas/i386/optimize-1.s: Likewise. * testsuite/gas/i386/optimize-2.d: Likewise. * testsuite/gas/i386/optimize-2.s: Likewise. * testsuite/gas/i386/optimize-3.d: Likewise. * testsuite/gas/i386/optimize-3.s: Likewise. * testsuite/gas/i386/x86-64-optimize-1.s: Likewise. * testsuite/gas/i386/x86-64-optimize-1.d: Likewise. * testsuite/gas/i386/x86-64-optimize-2.d: Likewise. * testsuite/gas/i386/x86-64-optimize-2.s: Likewise. * testsuite/gas/i386/x86-64-optimize-3.d: Likewise. * testsuite/gas/i386/x86-64-optimize-3.s: Likewise. * testsuite/gas/i386/x86-64-optimize-4.d: Likewise. * testsuite/gas/i386/x86-64-optimize-4.s: Likewise. opcodes/ PR gas/22871 * i386-gen.c (opcode_modifiers): Add Optimize. * i386-opc.h (Optimize): New enum. (i386_opcode_modifier): Add optimize. * i386-opc.tbl: Add "Optimize" to "mov $imm, reg", "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem", "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem", "movq $imm, reg" and AVX256 and AVX512 versions of vandnps, vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor, vpxord and vpxorq. * i386-tbl.h: Regenerated.
Diffstat (limited to 'opcodes/i386-opc.h')
-rw-r--r--opcodes/i386-opc.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 4af1d7d..ece3f47 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -601,6 +601,9 @@ enum
*/
ImplicitQuadGroup,
+ /* Support encoding optimization. */
+ Optimize,
+
/* Compatible with old (<= 2.8.1) versions of gcc */
OldGcc,
/* AT&T mnemonic. */
@@ -678,6 +681,7 @@ typedef struct i386_opcode_modifier
unsigned int disp8memshift:3;
unsigned int nodefmask:1;
unsigned int implicitquadgroup:1;
+ unsigned int optimize:1;
unsigned int oldgcc:1;
unsigned int attmnemonic:1;
unsigned int attsyntax:1;