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authorJan Beulich <jbeulich@novell.com>2018-07-31 10:57:09 +0200
committerJan Beulich <jbeulich@suse.com>2018-07-31 10:57:09 +0200
commitae2387feae3f0798dd77c98a7107fdec38a99fe3 (patch)
treeb9ef25903fb7b2c2bb8385c521c0d6faf2c7411f /opcodes/i386-opc.h
parentfa77b93ab76cae42e9394592d7474c795bb28f7e (diff)
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x86: fold various AVX512 templates with so far differing Masking attributes
There's no insn allowing ZEROING_MASKING alone. Re-purpose its value for handling the not uncommon case of insns allowing either form of masking with register operands, but only merging masking with a memory operand.
Diffstat (limited to 'opcodes/i386-opc.h')
-rw-r--r--opcodes/i386-opc.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index e50097a..ace3d99 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -549,11 +549,11 @@ enum
EVex,
/* AVX512 masking support:
- 1: Zeroing-masking.
+ 1: Zeroing or merging masking depending on operands.
2: Merging-masking.
3: Both zeroing and merging masking.
*/
-#define ZEROING_MASKING 1
+#define DYNAMIC_MASKING 1
#define MERGING_MASKING 2
#define BOTH_MASKING 3
Masking,