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author | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2017-10-20 23:52:52 +0300 |
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committer | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2017-10-23 15:58:18 +0300 |
commit | 8cfcb7659cb844dff00efbbb644c15b650fb7e8b (patch) | |
tree | e9139b9cde353c68cfb9b963743cb73453e6d81c /opcodes/i386-opc.h | |
parent | ff1982d53a1fba573e7f9a3b455f7644440cb336 (diff) | |
download | gdb-8cfcb7659cb844dff00efbbb644c15b650fb7e8b.zip gdb-8cfcb7659cb844dff00efbbb644c15b650fb7e8b.tar.gz gdb-8cfcb7659cb844dff00efbbb644c15b650fb7e8b.tar.bz2 |
Enable Intel AVX512_VNNI instructions.
Intel has disclosed a set of new instructions. The spec is
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
gas/
* config/tc-i386.c (cpu_arch): Add .avx512_vnni.
(cpu_noarch): Add noavx512_vnni.
* doc/c-i386.texi: Document .avx512_vnni.
* testsuite/gas/i386/i386.exp: Add AVX512_VNNI tests.
* testsuite/gas/i386/avx512vnni-intel.d: New test.
* testsuite/gas/i386/avx512vnni.d: Likewise.
* testsuite/gas/i386/avx512vnni.s: Likewise.
* testsuite/gas/i386/avx512vnni_vl-intel.d: Likewise.
* testsuite/gas/i386/avx512vnni_vl.d: Likewise.
* testsuite/gas/i386/avx512vnni_vl.s: Likewise.
* testsuite/gas/i386/x86-64-avx512vnni-intel.d: Likewise.
* testsuite/gas/i386/x86-64-avx512vnni.d: Likewise.
* testsuite/gas/i386/x86-64-avx512vnni.s: Likewise.
* testsuite/gas/i386/x86-64-avx512vnni_vl-intel.d: Likewise.
* testsuite/gas/i386/x86-64-avx512vnni_vl.d: Likewise.
* testsuite/gas/i386/x86-64-avx512vnni_vl.s: Likewise.
opcodes/
* i386-dis.c (enum): Add PREFIX_EVEX_0F3850, PREFIX_EVEX_0F3851.
* i386-dis-evex.h (evex_table): Updated.
* i386-gen.c (cpu_flag_init): Add CPU_AVX512_VNNI,
CPU_ANY_AVX512_VNNI_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
(cpu_flags): Add CpuAVX512_VNNI.
* i386-opc.h (enum): Add CpuAVX512_VNNI.
(i386_cpu_flags): Add cpuavx512_vnni.
* i386-opc.tbl Add Intel AVX512_VNNI instructions.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-opc.h')
-rw-r--r-- | opcodes/i386-opc.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index a14f66d..34b57f5 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -200,6 +200,8 @@ enum CpuAVX512_VPOPCNTDQ, /* Intel AVX-512 VBMI2 Instructions support required. */ CpuAVX512_VBMI2, + /* Intel AVX-512 VNNI Instructions support required. */ + CpuAVX512_VNNI, /* mwaitx instruction required */ CpuMWAITX, /* Clzero instruction required */ @@ -243,7 +245,7 @@ enum /* If you get a compiler error for zero width of the unused field, comment it out. */ - #define CpuUnused (CpuMax + 1) +#define CpuUnused (CpuMax + 1) /* We can check if an instruction is available with array instead of bitfield. */ @@ -335,6 +337,7 @@ typedef union i386_cpu_flags unsigned int cpuavx512_4vnniw:1; unsigned int cpuavx512_vpopcntdq:1; unsigned int cpuavx512_vbmi2:1; + unsigned int cpuavx512_vnni:1; unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpuospke:1; |