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| author | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2017-10-20 23:26:11 +0300 |
|---|---|---|
| committer | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2017-10-23 15:58:13 +0300 |
| commit | 48521003d5300e1390d78dbbcae83febe5808aaf (patch) | |
| tree | 39410bdfb7f1836694c3302c03b1d728573bcae7 /opcodes/i386-opc.h | |
| parent | 53467f5707ec796c0490d55e74854258a78013f8 (diff) | |
| download | gdb-48521003d5300e1390d78dbbcae83febe5808aaf.zip gdb-48521003d5300e1390d78dbbcae83febe5808aaf.tar.gz gdb-48521003d5300e1390d78dbbcae83febe5808aaf.tar.bz2 | |
Enable Intel GFNI instructions.
Intel has disclosed a set of new instructions. The spec is
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
gas/
* config/tc-i386.c (cpu_arch): Add .gfni.
* doc/c-i386.texi: Document .gfni.
* testsuite/gas/i386/i386.exp: Add GFNI tests.
* testsuite/gas/i386/avx.s: New GFNI test.
* testsuite/gas/i386/x86-64-avx.s: Likewise.
* testsuite/gas/i386/avx.d: Adjust.
* testsuite/gas/i386/avx-intel.d: Likewise
* testsuite/gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-avx.d: Likewise.
* testsuite/gas/i386/avx512f_gfni-intel.d: New test.
* testsuite/gas/i386/avx512f_gfni.d: Likewise.
* testsuite/gas/i386/avx512f_gfni.s: Likewise.
* testsuite/gas/i386/avx512vl_gfni-intel.d: Likewise.
* testsuite/gas/i386/avx512vl_gfni.d: Likewise.
* testsuite/gas/i386/avx512vl_gfni.s: Likewise.
* testsuite/gas/i386/gfni-intel.d: Likewise.
* testsuite/gas/i386/gfni.d: Likewise.
* testsuite/gas/i386/gfni.s: Likewise.
* testsuite/gas/i386/x86-64-avx512f_gfni-intel.d: Likewise.
* testsuite/gas/i386/x86-64-avx512f_gfni.d: Likewise.
* testsuite/gas/i386/x86-64-avx512f_gfni.s: Likewise.
* testsuite/gas/i386/x86-64-avx512vl_gfni-intel.d: Likewise.
* testsuite/gas/i386/x86-64-avx512vl_gfni.d: Likewise.
* testsuite/gas/i386/x86-64-avx512vl_gfni.s: Likewise.
* testsuite/gas/i386/x86-64-avx_gfni-intel.d: Likewise.
* testsuite/gas/i386/x86-64-avx_gfni.d: Likewise.
* testsuite/gas/i386/x86-64-avx_gfni.s: Likewise.
* testsuite/gas/i386/x86-64-gfni-intel.d: Likewise.
* testsuite/gas/i386/x86-64-gfni.d: Likewise.
* testsuite/gas/i386/x86-64-gfni.s: Likewise.
opcodes/
* i386-dis.c (enum): Add PREFIX_0F38CF, PREFIX_0F3ACE, PREFIX_0F3ACF,
PREFIX_VEX_0F38CF, PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF,
PREFIX_EVEX_0F38CF, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF.
(enum): Add VEX_W_0F38CF_P_2, VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2,
EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2.
(prefix_table): Updated (see prefixes above).
(three_byte_table): Likewise.
(vex_w_table): Likewise.
* i386-dis-evex.h: Likewise.
* i386-gen.c (cpu_flag_init): Add CPU_GFNI_FLAGS, CpuGFNI.
(cpu_flags): Add CpuGFNI.
* i386-opc.h (enum): Add CpuGFNI.
(i386_cpu_flags): Add cpugfni.
* i386-opc.tbl: Add Intel GFNI instructions.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-opc.h')
| -rw-r--r-- | opcodes/i386-opc.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index f677c5c..bc14684 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -212,6 +212,8 @@ enum CpuPTWRITE, /* CET instruction support required */ CpuCET, + /* GFNI instructions required */ + CpuGFNI, /* MMX register support required */ CpuRegMMX, /* XMM register support required */ @@ -237,10 +239,8 @@ enum /* If you get a compiler error for zero width of the unused field, comment it out. */ - #define CpuUnused (CpuMax + 1) - /* We can check if an instruction is available with array instead of bitfield. */ typedef union i386_cpu_flags @@ -337,6 +337,7 @@ typedef union i386_cpu_flags unsigned int cpurdpid:1; unsigned int cpuptwrite:1; unsigned int cpucet:1; + unsigned int cpugfni:1; unsigned int cpuregmmx:1; unsigned int cpuregxmm:1; unsigned int cpuregymm:1; |