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author | Jan Beulich <jbeulich@novell.com> | 2018-04-26 08:30:06 +0200 |
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committer | Jan Beulich <jbeulich@suse.com> | 2018-04-26 08:30:06 +0200 |
commit | 2f1bada2dc2e7215cd633b6c39a6c31dbd875bc0 (patch) | |
tree | 9cdf4c97da8b6e792181ea59c0ceb4376f3f53c4 /opcodes/i386-opc.h | |
parent | dcd7e323760ab296262a2e18e9869d37ff59f340 (diff) | |
download | gdb-2f1bada2dc2e7215cd633b6c39a6c31dbd875bc0.zip gdb-2f1bada2dc2e7215cd633b6c39a6c31dbd875bc0.tar.gz gdb-2f1bada2dc2e7215cd633b6c39a6c31dbd875bc0.tar.bz2 |
x86: drop VexImmExt
It's only used in assertions, and hence not really needed for correct
code generation.
Diffstat (limited to 'opcodes/i386-opc.h')
-rw-r--r-- | opcodes/i386-opc.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 9116132..84f3c0a 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -532,8 +532,6 @@ enum #define XOP2SOURCES 1 #define VEX3SOURCES 2 VexSources, - /* instruction has VEX 8 bit imm */ - VexImmExt, /* Instruction with vector SIB byte: 1: 128bit vector register. 2: 256bit vector register. @@ -655,7 +653,6 @@ typedef struct i386_opcode_modifier unsigned int vexw:2; unsigned int vexopcode:3; unsigned int vexsources:2; - unsigned int veximmext:1; unsigned int vecsib:2; unsigned int sse2avx:1; unsigned int noavx:1; |