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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-14 17:35:47 +0000 |
|---|---|---|
| committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-14 17:35:47 +0000 |
| commit | b195470dd29e8a5c8810209fb2d22c30004fe6ab (patch) | |
| tree | 6b458e668bbae8dd38eeec8e8849ec8da79010d2 /opcodes/i386-opc.h | |
| parent | 3067d3b96cfb88e86acf94d2aa1575cff0e0110f (diff) | |
| download | gdb-b195470dd29e8a5c8810209fb2d22c30004fe6ab.zip gdb-b195470dd29e8a5c8810209fb2d22c30004fe6ab.tar.gz gdb-b195470dd29e8a5c8810209fb2d22c30004fe6ab.tar.bz2 | |
[AArch64][PATCH 12/14] Support FP16 Adv.SIMD Scalar Pairwise instructions.
ARMv8.2 adds 16-bit floating point operations as an optional extension
to the floating point and Adv.SIMD support. This patch adds FP16
instructions to the group Adv.SIMD Scalar Pairwise, making them
available when +simd+fp16 is enabled.
The instructions added are: FMAXNMP, FADDP, FMAXP, FMINNMP and FMINP
The general form for these instructions is
<OP> <Hd>, <V>.<T>
where T is 4h or 8h.
gas/testsuite/
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/advsimd-fp16.d: Update expected output.
* gas/aarch64/advsimd-fp16.s: Add tests for Adv.SIMD Scalar
Pairwise instructions.
opcodes/
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
* aarch64-tbl.h (QL_SISD_PAIR_H): New.
(aarch64_opcode_table): Add fp16 versions of fmaxnmp, faddp,
fmaxp, fminnmp, fminp to the Adv.SIMD scalar pairwise group.
Change-Id: I19937ede3441b66dd0f940269ece895b17d3c345
Diffstat (limited to 'opcodes/i386-opc.h')
0 files changed, 0 insertions, 0 deletions