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authorJan Beulich <jbeulich@novell.com>2017-12-18 09:34:00 +0100
committerJan Beulich <jbeulich@suse.com>2017-12-18 09:34:00 +0100
commitdc821c5f9ae5208ad1ec438718f75e224f856deb (patch)
tree2c8c7c089e3196e1956fbb30a7088d6172a08104 /opcodes/i386-opc.h
parenteccab96d54a9455557d3c4d5bff431f6e526d0b7 (diff)
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x86: replace Reg8, Reg16, Reg32, and Reg64
Use a combination of a single new Reg bit and Byte, Word, Dword, or Qword instead. Besides shrinking the number of operand type bits this has the benefit of making register handling more similar to accumulator handling (a generic flag is being accompanied by a "size qualifier"). It requires, however, to split a few insn templates, as it is no longer correct to have combinations like Reg32|Reg64|Byte. This slight growth in size will hopefully be outweighed by this change paving the road for folding a presumably much larger number of templates later on.
Diffstat (limited to 'opcodes/i386-opc.h')
-rw-r--r--opcodes/i386-opc.h15
1 files changed, 3 insertions, 12 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index c76ebb7..920f53c 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -685,14 +685,8 @@ typedef struct i386_opcode_modifier
enum
{
- /* 8bit register */
- Reg8 = 0,
- /* 16bit register */
- Reg16,
- /* 32bit register */
- Reg32,
- /* 64bit register */
- Reg64,
+ /* Register (qualified by Byte, Word, etc) */
+ Reg = 0,
/* Floating pointer stack register */
FloatReg,
/* MMX register */
@@ -814,10 +808,7 @@ typedef union i386_operand_type
{
struct
{
- unsigned int reg8:1;
- unsigned int reg16:1;
- unsigned int reg32:1;
- unsigned int reg64:1;
+ unsigned int reg:1;
unsigned int floatreg:1;
unsigned int regmmx:1;
unsigned int regxmm:1;