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author | H.J. Lu <hjl.tools@gmail.com> | 2010-07-01 21:55:02 +0000 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2010-07-01 21:55:02 +0000 |
commit | c7b8aa3a72401a50a5736ed70ad8be809f82321c (patch) | |
tree | fa5c00a2fd93fdf002378367c943893fc8b5b898 /opcodes/i386-opc.h | |
parent | d41c0fc8a94bc29f0490c841c2823657ad71a279 (diff) | |
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Support AVX Programming Reference (June, 2010)
gas/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* config/tc-i386.c (cpu_arch): Add .xsaveopt, .fsgsbase, .rdrnd
and .f16c.
* doc/c-i386.texi: Document xsaveopt, fsgsbase, rdrnd and f16c.
gas/testsuite/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* gas/i386/arch-10.s: Add xsaveopt.
* gas/i386/x86-64-arch-2.s: Likwise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/f16c-intel.d: New.
* gas/i386/f16c.d: Likewise.
* gas/i386/f16c.s: Likewise.
* gas/i386/fsgs-intel.d: Likewise.
* gas/i386/fsgs.d: Likewise.
* gas/i386/fsgs.s: Likewise.
* gas/i386/rdrnd-intel.d: Likewise.
* gas/i386/rdrnd.d: Likewise.
* gas/i386/rdrnd.s: Likewise.
* gas/i386/x86-64-f16c-intel.d: Likewise.
* gas/i386/x86-64-f16c.d: Likewise.
* gas/i386/x86-64-f16c.s: Likewise.
* gas/i386/x86-64-fsgs-intel.d: Likewise.
* gas/i386/x86-64-fsgs.d: Likewise.
* gas/i386/x86-64-fsgs.s: Likewise.
* gas/i386/x86-64-rdrnd-intel.d: Likewise.
* gas/i386/x86-64-rdrnd.d: Likewise.
* gas/i386/x86-64-rdrnd.s: Likewise.
* gas/i386/i386.exp: Run f16c, f16c-intel, fsgs, fsgs-intel,
rdrnd, rdrnd-intel, x86-64-f16c, x86-64-f16c-intel, x86-64-fsgs,
x86-64-fsgs-intel, x86-64-rdrnd, x86-64-rdrnd-intel.
* gas/i386/x86-64-xsave.s: Add tests for xsaveopt64.
* gas/i386/x86-64-xsave-intel.d: Updated.
* gas/i386/x86-64-xsave.d: Likewise.
opcodes/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* i386-dis.c (PREFIX_0FAE_REG_0): New.
(PREFIX_0FAE_REG_1): Likewise.
(PREFIX_0FAE_REG_2): Likewise.
(PREFIX_0FAE_REG_3): Likewise.
(PREFIX_VEX_3813): Likewise.
(PREFIX_VEX_3A1D): Likewise.
(prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
PREFIX_VEX_3A1D.
(vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
(mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
* i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
(cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
* i386-opc.h (CpuXsaveopt): New.
(CpuFSGSBase):Likewise.
(CpuRdRnd): Likewise.
(CpuF16C): Likewise.
(i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
cpuf16c.
* i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
Diffstat (limited to 'opcodes/i386-opc.h')
-rw-r--r-- | opcodes/i386-opc.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index ba4edd7..0fa7e85 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -94,6 +94,8 @@ enum CpuL1OM, /* Xsave/xrstor New Instuctions support required */ CpuXsave, + /* Xsaveopt New Instuctions support required */ + CpuXsaveopt, /* AES support required */ CpuAES, /* PCLMUL support required */ @@ -112,6 +114,12 @@ enum CpuEPT, /* RDTSCP Instuction support required */ CpuRdtscp, + /* FSBSBASE Instructions required */ + CpuFSGSBase, + /* RDRND Instructions required */ + CpuRdRnd, + /* F16C Instructions required */ + CpuF16C, /* 64bit support available, used by -march= in assembler. */ CpuLM, /* 64bit support required */ @@ -168,6 +176,7 @@ typedef union i386_cpu_flags unsigned int cpuavx:1; unsigned int cpul1om:1; unsigned int cpuxsave:1; + unsigned int cpuxsaveopt:1; unsigned int cpuaes:1; unsigned int cpupclmul:1; unsigned int cpufma:1; @@ -177,6 +186,9 @@ typedef union i386_cpu_flags unsigned int cpumovbe:1; unsigned int cpuept:1; unsigned int cpurdtscp:1; + unsigned int cpufsgsbase:1; + unsigned int cpurdrnd:1; + unsigned int cpuf16c:1; unsigned int cpulm:1; unsigned int cpu64:1; unsigned int cpuno64:1; |