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| author | Jan Beulich <jbeulich@suse.com> | 2023-02-24 13:58:35 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2023-02-24 13:58:35 +0100 |
| commit | c3bb24f5663f3e423f313bc16f27e32ef5e1dc0a (patch) | |
| tree | 0a8f85558ebcb713353cd74ef1d2224313c88d3e /opcodes/i386-opc.h | |
| parent | 5eeeafe0a6884eaf1c5a21160e78e53842fa7cba (diff) | |
| download | gdb-c3bb24f5663f3e423f313bc16f27e32ef5e1dc0a.zip gdb-c3bb24f5663f3e423f313bc16f27e32ef5e1dc0a.tar.gz gdb-c3bb24f5663f3e423f313bc16f27e32ef5e1dc0a.tar.bz2 | |
x86-64: don't permit LAHF/SAHF with "generic64"
The feature isn't universally available on 64-bit CPUs.
Note that in i386-gen.c:isa_dependencies[] I'm only adding it to models
where I'm certain the functionality exists. For Nocona and Core I'm
uncertain in particular.
Diffstat (limited to 'opcodes/i386-opc.h')
| -rw-r--r-- | opcodes/i386-opc.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 03811a7..3597203 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -137,6 +137,8 @@ enum CpuMovbe, /* CMPXCHG16B instruction support required. */ CpuCX16, + /* LAHF/SAHF instruction support required (in 64-bit mode). */ + CpuLAHF_SAHF, /* EPT Instructions required */ CpuEPT, /* RDTSCP Instruction support required */ @@ -372,6 +374,7 @@ typedef union i386_cpu_flags unsigned int cputbm:1; unsigned int cpumovbe:1; unsigned int cpucx16:1; + unsigned int cpulahf_sahf:1; unsigned int cpuept:1; unsigned int cpurdtscp:1; unsigned int cpufsgsbase:1; |