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authorH.J. Lu <hjl.tools@gmail.com>2018-09-14 12:19:58 -0700
committerH.J. Lu <hjl.tools@gmail.com>2018-09-14 12:20:10 -0700
commit6865c0435a54e6d5f1fcc5cdcd56895e9a3c5484 (patch)
treec27434e6a5abb3f09b2ee53ea2f34cc6d062f684 /opcodes/i386-opc.h
parent70df6fc9bc9e114f46532dbe58caa98e495b119c (diff)
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x86: Support VEX/EVEX WIG encoding
Add VEXWIG, defined as 3, to indicate that the VEX.W/EVEX.W bit is ignored by such VEX/EVEX instructions, aka WIG instructions. Set VexW=3 on VEX/EVEX WIG instructions. Update assembler to check VEXWIG when setting the VEX.W bit. gas/ PR gas/23642 * config/tc-i386.c (build_vex_prefix): Check VEXWIG when setting the VEX.W bit. (build_evex_prefix): Check VEXWIG when setting the EVEX.W bit. opcodes/ PR gas/23642 * i386-opc.h (VEXWIG): New. * i386-opc.tbl: Set VexW=3 on VEX/EVEX WIG instructions. * i386-tbl.h: Regenerated.
Diffstat (limited to 'opcodes/i386-opc.h')
-rw-r--r--opcodes/i386-opc.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index a7f0ba2..0a0ff97 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -499,9 +499,11 @@ enum
0: Set by the REX.W bit.
1: VEX.W0. Should always be 0.
2: VEX.W1. Should always be 1.
+ 3: VEX.WIG. The VEX.W bit is ignored.
*/
#define VEXW0 1
#define VEXW1 2
+#define VEXWIG 3
VexW,
/* VEX opcode prefix:
0: VEX 0x0F opcode prefix.