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authorH.J. Lu <hjl.tools@gmail.com>2018-08-11 14:37:14 -0700
committerH.J. Lu <hjl.tools@gmail.com>2018-08-11 14:37:32 -0700
commitd871f3f48388d57721d8077e281041ed16a745cf (patch)
tree31db918f0c563c84b09de4674bb4af3548b1483c /opcodes/i386-opc.h
parentab9e342807d132182892de1be1a92d6e91a5c1da (diff)
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x86: Add CpuCMOV and CpuFXSR
There are separate CPUID feature bits for fxsave/fxrstor and cmovCC instructions. This patch adds CpuCMOV and CpuFXSR to replace Cpu686 on corresponding instructions. gas/ * config/tc-i386.c (cpu_arch): Add .cmov and .fxsr. (cpu_noarch): Add nocmov and nofxsr. * doc/c-i386.texi: Document cmov and fxsr. opcodes/ * i386-gen.c (cpu_flag_init): Add CpuCMOV and CpuFXSR to CPU_I686_FLAGS. Add CPU_CMOV_FLAGS, CPU_FXSR_FLAGS, CPU_ANY_CMOV_FLAGS and CPU_ANY_FXSR_FLAGS. (cpu_flags): Add CpuCMOV and CpuFXSR. * i386-opc.tbl: Replace Cpu686 with CpuFXSR on fxsave, fxsave64, fxrstor and fxrstor64. Replace Cpu686 with CpuCMOV on cmovCC. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-opc.h')
-rw-r--r--opcodes/i386-opc.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index ecfdc7f..3d0dd44 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -43,6 +43,10 @@ enum
Cpu586,
/* i686 or better required */
Cpu686,
+ /* CMOV Instruction support required */
+ CpuCMOV,
+ /* FXSR Instruction support required */
+ CpuFXSR,
/* CLFLUSH Instruction support required */
CpuClflush,
/* NOP Instruction support required */
@@ -262,6 +266,8 @@ typedef union i386_cpu_flags
unsigned int cpui486:1;
unsigned int cpui586:1;
unsigned int cpui686:1;
+ unsigned int cpucmov:1;
+ unsigned int cpufxsr:1;
unsigned int cpuclflush:1;
unsigned int cpunop:1;
unsigned int cpusyscall:1;