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| author | H.J. Lu <hjl.tools@gmail.com> | 2007-03-21 20:45:14 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2007-03-21 20:45:14 +0000 |
| commit | 8b38ad713b4d7d3cf34d59efcdeb562cad46b364 (patch) | |
| tree | 5dbe615ac85a15bd01cc0c6cacf1c3933e3f3571 /opcodes/i386-opc.c | |
| parent | ffa8bd48e33d601fc4fccc3ad14449c80483daa2 (diff) | |
| download | gdb-8b38ad713b4d7d3cf34d59efcdeb562cad46b364.zip gdb-8b38ad713b4d7d3cf34d59efcdeb562cad46b364.tar.gz gdb-8b38ad713b4d7d3cf34d59efcdeb562cad46b364.tar.bz2 | |
gas/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4218
* config/tc-i386.c (match_template): Properly handle 64bit mode
"xchg %eax, %eax".
gas/testsuite/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4218
* gas/i386/nops.s: Add testcases for nop r/m.
* gas/i386/x86-64-nops.s: Likewise.
* gas/i386/x86-64-opcode.s: Add testcases for xchg with %ax,
%eax and %rax.
* gas/i386/nops.d: Updated.
* gas/i386/x86-64-nops.d: Likewise.
* gas/i386/x86-64-opcode.d: Likewise.
opcodes/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4218
* i386-dis.c (PREGRP38): New.
(dis386): Use PREGRP38 for 0x90.
(prefix_user_table): Add PREGRP38.
(print_insn): Set uses_REPZ_prefix to 1 for pause.
(NOP_Fixup1): Properly handle REX bits.
(NOP_Fixup2): Likewise.
* i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
Allow register with nop.
Diffstat (limited to 'opcodes/i386-opc.c')
| -rw-r--r-- | opcodes/i386-opc.c | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/opcodes/i386-opc.c b/opcodes/i386-opc.c index 9c96113..373b1dd 100644 --- a/opcodes/i386-opc.c +++ b/opcodes/i386-opc.c @@ -144,12 +144,10 @@ const template i386_optab[] = xchg commutes: we allow both operand orders. In the 64bit code, xchg rax, rax is reused for new nop instruction. */ -{"xchg", 2, 0x90, X, CpuNo64, wl_Suf|ShortForm, { WordReg, Acc, 0 } }, -{"xchg", 2, 0x90, X, CpuNo64, wl_Suf|ShortForm, { Acc, WordReg, 0 } }, -{"xchg", 2, 0x90, X, Cpu64, wq_Suf|ShortForm, { Reg16|Reg64, Acc, 0 } }, -{"xchg", 2, 0x90, X, Cpu64, wq_Suf|ShortForm, { Acc, Reg16|Reg64, 0 } }, -{"xchg", 2, 0x86, X, 0, bwlq_Suf|W|Modrm, { Reg, Reg|AnyMem, 0 } }, -{"xchg", 2, 0x86, X, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, Reg, 0 } }, +{"xchg", 2, 0x90, X, 0, wlq_Suf|ShortForm, { WordReg, Acc, 0 } }, +{"xchg", 2, 0x90, X, 0, wlq_Suf|ShortForm, { Acc, WordReg, 0 } }, +{"xchg", 2, 0x86, X, 0, bwlq_Suf|W|Modrm, { Reg, Reg|AnyMem, 0 } }, +{"xchg", 2, 0x86, X, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, Reg, 0 } }, /* In/out from ports. */ /* XXX should reject %rax */ @@ -517,7 +515,7 @@ const template i386_optab[] = {"hlt", 0, 0xf4, X, 0, NoSuf, { 0, 0, 0} }, -{"nop", 1, 0x0f1f, X, Cpu686, wl_Suf|Modrm, { WordMem, 0, 0} }, +{"nop", 1, 0x0f1f, 0, Cpu686, wlq_Suf|Modrm, { WordReg|WordMem, 0, 0} }, /* nop is actually "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in 32bit mode and "xchg %rax,%rax" in 64bit mode. */ |