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| author | Jan Beulich <jbeulich@suse.com> | 2020-02-13 10:19:28 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2020-02-13 10:19:28 +0100 |
| commit | 7deea9aad86683a4bcc68d6dd073038039f7a267 (patch) | |
| tree | 5c65487902b62b9a4f48c25f47a30081f7408924 /opcodes/i386-init.h | |
| parent | f3b0f7fe42309fa0e00b4d2074b0faefbf2e8ffd (diff) | |
| download | gdb-7deea9aad86683a4bcc68d6dd073038039f7a267.zip gdb-7deea9aad86683a4bcc68d6dd073038039f7a267.tar.gz gdb-7deea9aad86683a4bcc68d6dd073038039f7a267.tar.bz2 | |
x86: fix SSE4a dependencies of ".arch .nosse*"
Since ".arch .sse4a" enables SSE3 and earlier, disabling SSE3 should
also disable SSE4a. And as per its name, ".arch .nosse4" should also do
so.
Diffstat (limited to 'opcodes/i386-init.h')
| -rw-r--r-- | opcodes/i386-init.h | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index 2c93158..8ecf11719 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -1132,7 +1132,7 @@ #define CPU_ANY_SSE2_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \ - 0, 1, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 1, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ @@ -1140,7 +1140,7 @@ #define CPU_ANY_SSE3_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 1, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 1, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ @@ -1170,6 +1170,14 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } +#define CPU_ANY_SSE4_FLAGS \ + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + #define CPU_ANY_AVX_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ |