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| author | Jan Beulich <jbeulich@suse.com> | 2019-07-16 09:30:29 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2019-07-16 09:30:29 +0200 |
| commit | 21df382b918888de64749e977f185c4e10a5b838 (patch) | |
| tree | 0304ccc5838584e7f3cadb92a206e4a2b616fed8 /opcodes/i386-gen.c | |
| parent | 206e6c58a769f9ec63827b8ca3952b0cd8c828ba (diff) | |
| download | gdb-21df382b918888de64749e977f185c4e10a5b838.zip gdb-21df382b918888de64749e977f185c4e10a5b838.tar.gz gdb-21df382b918888de64749e977f185c4e10a5b838.tar.bz2 | |
x86: fold SReg{2,3}
They're the only exception to there generally being no mix of register
kinds possible in an insn operand template, and there being two bits per
operand for their representation is also quite wasteful, considering the
low number of uses. Fold both bits and deal with the little bit of
fallout.
Also take the liberty and drop dead code trying to set REX_B: No segment
register has RegRex set on it.
Additionally I was quite surprised that PUSH/POP with the permitted
segment registers is not covered by the test cases. Add the missing
pieces.
Diffstat (limited to 'opcodes/i386-gen.c')
| -rw-r--r-- | opcodes/i386-gen.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 6e457a8..97af25b 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -440,10 +440,8 @@ static initializer operand_type_init[] = "FloatReg" }, { "OPERAND_TYPE_FLOATACC", "FloatAcc" }, - { "OPERAND_TYPE_SREG2", - "SReg2" }, - { "OPERAND_TYPE_SREG3", - "SReg3" }, + { "OPERAND_TYPE_SREG", + "SReg" }, { "OPERAND_TYPE_JUMPABSOLUTE", "JumpAbsolute" }, { "OPERAND_TYPE_REGMMX", @@ -702,8 +700,7 @@ static bitfield operand_types[] = BITFIELD (Control), BITFIELD (Debug), BITFIELD (Test), - BITFIELD (SReg2), - BITFIELD (SReg3), + BITFIELD (SReg), BITFIELD (Acc), BITFIELD (JumpAbsolute), BITFIELD (EsSeg), |