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author | H.J. Lu <hjl.tools@gmail.com> | 2008-01-03 05:29:53 +0000 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2008-01-03 05:29:53 +0000 |
commit | e0329a226609e464988129ffde49992df8649aca (patch) | |
tree | 1057a4a0fb326c32ecf68a069497edeac8ff5258 /opcodes/i386-gen.c | |
parent | 18a2244ddde98503db6204adb8e3e03f0c3ed03e (diff) | |
download | gdb-e0329a226609e464988129ffde49992df8649aca.zip gdb-e0329a226609e464988129ffde49992df8649aca.tar.gz gdb-e0329a226609e464988129ffde49992df8649aca.tar.bz2 |
gas/testsuite/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-5.d: New file.
* gas/i386/arch-5.s: Likewise.
* gas/i386/arch-6.d: Likewise.
* gas/i386/arch-6.s: Likewise.
* gas/i386/arch-7.d: Likewise.
* gas/i386/arch-7.s: Likewise.
* gas/i386/arch-8.d: Likewise.
* gas/i386/arch-8.s: Likewise.
* gas/i386/i386.exp: Run arch-5, arch-6, arch-7 and arch-8.
opcodes/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
CPU_SSE5_FLAGS.
(cpu_flags): Add CpuSSE4_2_Or_ABM.
* i386-opc.h (CpuSSE4_2_Or_ABM): New.
(CpuLM): Updated.
(i386_cpu_flags): Add cpusse4_2_or_abm.
* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
CpuABM|CpuSSE4_2 on popcnt.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-gen.c')
-rw-r--r-- | opcodes/i386-gen.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 8ae6bd0..0665e5f 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -81,7 +81,7 @@ static initializer cpu_flag_init [] = { "CPU_K8_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuK6|CpuK8|CpuMMX|CpuMMX2|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuLM" }, { "CPU_AMDFAM10_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuK6|CpuK8|CpuMMX|CpuMMX2|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuK6|CpuK8|CpuMMX|CpuMMX2|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuSSE4_2_Or_ABM|CpuLM" }, { "CPU_MMX_FLAGS", "CpuMMX" }, { "CPU_SSE_FLAGS", @@ -95,7 +95,7 @@ static initializer cpu_flag_init [] = { "CPU_SSE4_1_FLAGS", "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_1_Or_5" }, { "CPU_SSE4_2_FLAGS", - "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4_1_Or_5" }, + "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4_1_Or_5|CpuSSE4_2_Or_ABM" }, { "CPU_3DNOW_FLAGS", "CpuMMX|Cpu3dnow" }, { "CPU_3DNOWA_FLAGS", @@ -107,9 +107,9 @@ static initializer cpu_flag_init [] = { "CPU_SSE4A_FLAGS", "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a" }, { "CPU_ABM_FLAGS", - "CpuABM" }, + "CpuABM|CpuSSE4_2_Or_ABM" }, { "CPU_SSE5_FLAGS", - "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuSSE5|CpuSSE4_1_Or_5"}, + "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuSSE5|CpuSSE4_1_Or_5|CpuSSE4_2_Or_ABM"}, }; static initializer operand_type_init [] = @@ -235,6 +235,7 @@ static bitfield cpu_flags[] = BITFIELD (CpuSSE4a), BITFIELD (CpuSSE5), BITFIELD (CpuSSE4_1_Or_5), + BITFIELD (CpuSSE4_2_Or_ABM), BITFIELD (Cpu3dnow), BITFIELD (Cpu3dnowA), BITFIELD (CpuPadLock), |