aboutsummaryrefslogtreecommitdiff
path: root/opcodes/i386-gen.c
diff options
context:
space:
mode:
authorH.J. Lu <hjl.tools@gmail.com>2008-01-22 19:57:30 +0000
committerH.J. Lu <hjl.tools@gmail.com>2008-01-22 19:57:30 +0000
commit115c7c25fec67e650084943e7e7282d2ad4a3d63 (patch)
treefabb39a0cd14c93cabe6b3afd80c1e66d9968446 /opcodes/i386-gen.c
parent60c4664782e3f003a4d032c984c29b2a7a7cfdeb (diff)
downloadgdb-115c7c25fec67e650084943e7e7282d2ad4a3d63.zip
gdb-115c7c25fec67e650084943e7e7282d2ad4a3d63.tar.gz
gdb-115c7c25fec67e650084943e7e7282d2ad4a3d63.tar.bz2
gas/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (i386_target_format): Remove cpummx2. gas/testsuite/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.d: New. * gas/i386/arch-11.s: Likewise. * gas/i386/arch-12.d: Likewise. * gas/i386/arch-12.s: Likewise. * gas/i386/i386.exp: Run arch-11 and arch-12. opcodes/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Remove CpuMMX2. (cpu_flags): Likewise. * i386-opc.h (CpuMMX2): Removed. (CpuSSE): Updated. * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-gen.c')
-rw-r--r--opcodes/i386-gen.c37
1 files changed, 18 insertions, 19 deletions
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 69c5a02..74cb71b 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -45,7 +45,7 @@ static initializer cpu_flag_init [] =
{ "CPU_GENERIC32_FLAGS",
"Cpu186|Cpu286|Cpu386" },
{ "CPU_GENERIC64_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuSSE|CpuSSE2" },
{ "CPU_NONE_FLAGS",
"0" },
{ "CPU_I186_FLAGS",
@@ -63,39 +63,39 @@ static initializer cpu_flag_init [] =
{ "CPU_P2_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuMMX" },
{ "CPU_P3_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuMMX|CpuMMX2|CpuSSE" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuMMX|CpuSSE" },
{ "CPU_P4_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuSSE|CpuSSE2" },
{ "CPU_NOCONA_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuLM" },
{ "CPU_CORE_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3" },
{ "CPU_CORE2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuLM" },
{ "CPU_K6_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuK6|CpuMMX" },
{ "CPU_K6_2_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuK6|CpuMMX|Cpu3dnow" },
{ "CPU_ATHLON_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuK6|CpuMMX|CpuMMX2|Cpu3dnow|Cpu3dnowA" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuK6|CpuMMX|Cpu3dnow|Cpu3dnowA" },
{ "CPU_K8_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuK6|CpuK8|CpuMMX|CpuMMX2|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuK6|CpuK8|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuLM" },
{ "CPU_AMDFAM10_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuK6|CpuK8|CpuMMX|CpuMMX2|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuK6|CpuK8|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" },
{ "CPU_MMX_FLAGS",
"CpuMMX" },
{ "CPU_SSE_FLAGS",
- "CpuMMX|CpuMMX2|CpuSSE" },
+ "CpuMMX|CpuSSE" },
{ "CPU_SSE2_FLAGS",
- "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2" },
+ "CpuMMX|CpuSSE|CpuSSE2" },
{ "CPU_SSE3_FLAGS",
- "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3" },
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3" },
{ "CPU_SSSE3_FLAGS",
- "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3" },
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3" },
{ "CPU_SSE4_1_FLAGS",
- "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1" },
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1" },
{ "CPU_SSE4_2_FLAGS",
- "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2" },
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2" },
{ "CPU_VMX_FLAGS",
"CpuVMX" },
{ "CPU_SMX_FLAGS",
@@ -103,17 +103,17 @@ static initializer cpu_flag_init [] =
{ "CPU_3DNOW_FLAGS",
"CpuMMX|Cpu3dnow" },
{ "CPU_3DNOWA_FLAGS",
- "CpuMMX|CpuMMX2|Cpu3dnow|Cpu3dnowA" },
+ "CpuMMX|Cpu3dnow|Cpu3dnowA" },
{ "CPU_PADLOCK_FLAGS",
"CpuPadLock" },
{ "CPU_SVME_FLAGS",
"CpuSVME" },
{ "CPU_SSE4A_FLAGS",
- "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a" },
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a" },
{ "CPU_ABM_FLAGS",
"CpuABM" },
{ "CPU_SSE5_FLAGS",
- "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuSSE5"},
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuSSE5"},
};
static initializer operand_type_init [] =
@@ -229,7 +229,6 @@ static bitfield cpu_flags[] =
BITFIELD (CpuK6),
BITFIELD (CpuK8),
BITFIELD (CpuMMX),
- BITFIELD (CpuMMX2),
BITFIELD (CpuSSE),
BITFIELD (CpuSSE2),
BITFIELD (CpuSSE3),