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author | Sebastian Pop <sebastian.pop@amd.com> | 2009-11-05 23:40:05 +0000 |
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committer | Sebastian Pop <sebastian.pop@amd.com> | 2009-11-05 23:40:05 +0000 |
commit | f88c9eb030684877952d1316567fdc461d69772a (patch) | |
tree | e7da5818868361faa92bcf0b99d702d2b0b967dd /opcodes/i386-gen.c | |
parent | d85a05f07f9f01c6b7e0e84491ca7972a621b85b (diff) | |
download | gdb-f88c9eb030684877952d1316567fdc461d69772a.zip gdb-f88c9eb030684877952d1316567fdc461d69772a.tar.gz gdb-f88c9eb030684877952d1316567fdc461d69772a.tar.bz2 |
2009-11-05 Sebastian Pop <sebastian.pop@amd.com>
Quentin Neill <quentin.neill@amd.com>
* gas/config/tc-i386.c (cpu_arch): Add CPU_LWP_FLAGS.
(build_vex_prefix): Handle xop09 and xop0a.
(build_modrm_byte): Handle vexlwp.
(md_show_usage): Add lwp.
* gas/doc/c-i386.texi (i386-LWP): New section.
* gas/testsuite/gas/i386/i386.exp: Run x86-64-lwp in 64-bit mode,
run lwp in 32-bit mode.
* gas/testsuite/gas/i386/x86-64-lwp.d: New.
* gas/testsuite/gas/i386/x86-64-lwp.s: New.
* gas/testsuite/gas/i386/lwp.d: New.
* gas/testsuite/gas/i386/lwp.s: New.
* opcodes/i386-dis.c (OP_LWPCB_E): New.
(OP_LWP_E): New.
(OP_LWP_I): New.
(USE_XOP_8F_TABLE): New.
(XOP_8F_TABLE): New.
(REG_XOP_LWPCB): New.
(REG_XOP_LWP): New.
(XOP_09): New.
(XOP_0A): New.
(reg_table): Redirect REG_8F to XOP_8F_TABLE.
Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
(xop_table): New.
(get_valid_dis386): Handle USE_XOP_8F_TABLE.
Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
to access to the vex_table.
(OP_LWPCB_E): New.
(OP_LWP_E): New.
(OP_LWP_I): New.
* opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
(cpu_flags): Add CpuLWP.
(opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
* opcodes/i386-opc.h (CpuLWP): New.
(i386_cpu_flags): Add bit cpulwp.
(VexLWP): New.
(XOP09): New.
(XOP0A): New.
(i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
* opcodes/i386-opc.tbl (llwpcb): Added.
(lwpval): Added.
(lwpins): Added.
Diffstat (limited to 'opcodes/i386-gen.c')
-rw-r--r-- | opcodes/i386-gen.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 337f93c..d877f83 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -128,6 +128,8 @@ static initializer cpu_flag_init[] = "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuFMA" }, { "CPU_FMA4_FLAGS", "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuFMA4" }, + { "CPU_LWP_FLAGS", + "CpuLWP" }, { "CPU_MOVBE_FLAGS", "CpuMovbe" }, { "CPU_RDTSCP_FLAGS", @@ -295,7 +297,8 @@ static bitfield cpu_flags[] = BITFIELD (CpuAES), BITFIELD (CpuPCLMUL), BITFIELD (CpuFMA), - BITFIELD (CpuFMA4), + BITFIELD (CpuFMA4), + BITFIELD (CpuLWP), BITFIELD (CpuLM), BITFIELD (CpuMovbe), BITFIELD (CpuEPT), @@ -349,11 +352,14 @@ static bitfield opcode_modifiers[] = BITFIELD (Vex), BITFIELD (VexNDS), BITFIELD (VexNDD), + BITFIELD (VexLWP), BITFIELD (VexW0), BITFIELD (VexW1), BITFIELD (Vex0F), BITFIELD (Vex0F38), BITFIELD (Vex0F3A), + BITFIELD (XOP09), + BITFIELD (XOP0A), BITFIELD (Vex3Sources), BITFIELD (VexImmExt), BITFIELD (SSE2AVX), |