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| author | Michael Meissner <gnu@the-meissners.org> | 2007-09-14 18:21:09 +0000 |
|---|---|---|
| committer | Michael Meissner <gnu@the-meissners.org> | 2007-09-14 18:21:09 +0000 |
| commit | 85f10a010c33d93dd5c6b21737184898391d3438 (patch) | |
| tree | 18280e3edf7aa1a87f3eecf9937ee7d74c12d093 /opcodes/i386-gen.c | |
| parent | 4a543daf06146700e2fcdc4d50a4d28c072b88cd (diff) | |
| download | gdb-85f10a010c33d93dd5c6b21737184898391d3438.zip gdb-85f10a010c33d93dd5c6b21737184898391d3438.tar.gz gdb-85f10a010c33d93dd5c6b21737184898391d3438.tar.bz2 | |
Add AMD SSE5 support
Diffstat (limited to 'opcodes/i386-gen.c')
| -rw-r--r-- | opcodes/i386-gen.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 36009cd..ddac292 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -107,7 +107,9 @@ static initializer cpu_flag_init [] = { "CPU_SSE4A_FLAGS", "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a" }, { "CPU_ABM_FLAGS", - "CpuABM" } + "CpuABM" }, + { "CPU_SSE5_FLAGS", + "CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuSSE5"} }; static initializer operand_type_init [] = @@ -231,6 +233,7 @@ static bitfield cpu_flags[] = BITFIELD (CpuSSE4_1), BITFIELD (CpuSSE4_2), BITFIELD (CpuSSE4a), + BITFIELD (CpuSSE5), BITFIELD (Cpu3dnow), BITFIELD (Cpu3dnowA), BITFIELD (CpuPadLock), @@ -277,6 +280,9 @@ static bitfield opcode_modifiers[] = BITFIELD (NoRex64), BITFIELD (Rex64), BITFIELD (Ugh), + BITFIELD (Drex), + BITFIELD (Drexv), + BITFIELD (Drexc), }; static bitfield operand_types[] = |