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| author | Jan Beulich <jbeulich@suse.com> | 2020-01-09 11:38:01 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2020-01-09 11:38:01 +0100 |
| commit | d835a58baae720abe909795cb68763040d1750a8 (patch) | |
| tree | f4a188a3fcfdc20e2f9bbfee761037dca16a39d7 /opcodes/i386-dis.c | |
| parent | 482556efed3529d76baca0c61f7fb72221e6dc9a (diff) | |
| download | gdb-d835a58baae720abe909795cb68763040d1750a8.zip gdb-d835a58baae720abe909795cb68763040d1750a8.tar.gz gdb-d835a58baae720abe909795cb68763040d1750a8.tar.bz2 | |
x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode on AMD
The disassembler change is such that in default mode we'd disassemble
the insns (for there not ebing any conflicts), but when AMD64 mode was
explicitly requested, we'd show them as "(bad)".
Diffstat (limited to 'opcodes/i386-dis.c')
| -rw-r--r-- | opcodes/i386-dis.c | 26 |
1 files changed, 20 insertions, 6 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index ce27e0e..5d24fb5 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -107,6 +107,7 @@ static void OP_3DNowSuffix (int, int); static void CMP_Fixup (int, int); static void BadOp (void); static void REP_Fixup (int, int); +static void SEP_Fixup (int, int); static void BND_Fixup (int, int); static void NOTRACK_Fixup (int, int); static void HLE_Fixup1 (int, int); @@ -412,6 +413,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define EMCq { OP_EMC, q_mode } #define MXC { OP_MXC, 0 } #define OPSUF { OP_3DNowSuffix, 0 } +#define SEP { SEP_Fixup, 0 } #define CMP { CMP_Fixup, 0 } #define XMM0 { XMM_Fixup, 0 } #define FXSAVE { FXSAVE_Fixup, 0 } @@ -2713,8 +2715,8 @@ static const struct dis386 dis386_twobyte[] = { { "rdtsc", { XX }, 0 }, { "rdmsr", { XX }, 0 }, { "rdpmc", { XX }, 0 }, - { "sysenter", { XX }, 0 }, - { "sysexit", { XX }, 0 }, + { "sysenter", { SEP }, 0 }, + { "sysexit", { SEP }, 0 }, { Bad_Opcode }, { "getsec", { XX }, 0 }, /* 38 */ @@ -11316,7 +11318,7 @@ static char scale_char; enum x86_64_isa { - amd64 = 0, + amd64 = 1, intel64 }; @@ -14829,12 +14831,12 @@ OP_J (int bytemode, int sizeflag) disp -= 0x100; break; case v_mode: - if (isa64 == amd64) + if (isa64 != intel64) case dqw_mode: USED_REX (REX_W); if ((sizeflag & DFLAG) || (address_mode == mode_64bit - && ((isa64 != amd64 && bytemode != dqw_mode) + && ((isa64 == intel64 && bytemode != dqw_mode) || (rex & REX_W)))) disp = get32s (); else @@ -14852,7 +14854,7 @@ OP_J (int bytemode, int sizeflag) & ~((bfd_vma) 0xffff)); } if (address_mode != mode_64bit - || (isa64 == amd64 && !(rex & REX_W))) + || (isa64 != intel64 && !(rex & REX_W))) used_prefixes |= (prefixes & PREFIX_DATA); break; default: @@ -15602,6 +15604,18 @@ REP_Fixup (int bytemode, int sizeflag) } } +static void +SEP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) +{ + if ( isa64 != amd64 ) + return; + + obufp = obuf; + BadOp (); + mnemonicendp = obufp; + ++codep; +} + /* For BND-prefixed instructions 0xF2 prefix should be displayed as "bnd". */ |