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| author | H.J. Lu <hjl.tools@gmail.com> | 2018-08-14 09:55:43 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2018-08-14 09:56:00 -0700 |
| commit | 1bc60e562458b1e1c25be808a62adb1cb6c20ff0 (patch) | |
| tree | 921b96f2c8781d43d529cf330c33f046b979906f /opcodes/i386-dis.c | |
| parent | 26fb3983d7062c6f6bc43028ae2074cc29d22c7e (diff) | |
| download | gdb-1bc60e562458b1e1c25be808a62adb1cb6c20ff0.zip gdb-1bc60e562458b1e1c25be808a62adb1cb6c20ff0.tar.gz gdb-1bc60e562458b1e1c25be808a62adb1cb6c20ff0.tar.bz2 | |
x86-64: Display eiz for address with the addr32 prefix
In 64-bit mode, display eiz for address with the addr32 prefix and without
base nor index registers. For
mov -0xccddef(,%eiz,), %rax
disassembler now displays:
67 48 8b 04 25 11 22 33 ff mov -0xccddef(,%eiz,1),%rax
instead of
67 48 8b 04 25 11 22 33 ff addr32 mov 0xffffffffff332211,%rax
gas/
* testsuite/gas/i386/evex-no-scale-64.d: Updated.
* testsuite/gas/i386/x86-64-addr32-intel.d: Likewise.
* testsuite/gas/i386/x86-64-addr32.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-addr32-intel.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-addr32.d: Likewise.
* testsuite/gas/i386/x86-64-addr32.s: Add %eiz tests.
opcodes/
* i386-dis.c (OP_E_memory): In 64-bit mode, display eiz for
address with the addr32 prefix and without base nor index
registers.
Diffstat (limited to 'opcodes/i386-dis.c')
| -rw-r--r-- | opcodes/i386-dis.c | 30 |
1 files changed, 23 insertions, 7 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 42d219c..77f2e2a 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -15337,6 +15337,7 @@ OP_E_memory (int bytemode, int sizeflag) int havebase; int haveindex; int needindex; + int needaddr32; int base, rbase; int vindex = 0; int scale = 0; @@ -15433,12 +15434,27 @@ OP_E_memory (int bytemode, int sizeflag) break; } - /* In 32bit mode, we need index register to tell [offset] from - [eiz*1 + offset]. */ - needindex = (havesib - && !havebase - && !haveindex - && address_mode == mode_32bit); + needindex = 0; + needaddr32 = 0; + if (havesib + && !havebase + && !haveindex + && address_mode != mode_16bit) + { + if (address_mode == mode_64bit) + { + /* Display eiz instead of addr32. */ + needindex = addr32flag; + needaddr32 = 1; + } + else + { + /* In 32-bit mode, we need index register to tell [offset] + from [eiz*1 + offset]. */ + needindex = 1; + } + } + havedisp = (havebase || needindex || (havesib && (haveindex || scale != 0))); @@ -15458,7 +15474,7 @@ OP_E_memory (int bytemode, int sizeflag) } } - if ((havebase || haveindex || riprel) + if ((havebase || haveindex || needaddr32 || riprel) && (bytemode != v_bnd_mode) && (bytemode != bnd_mode) && (bytemode != bnd_swap_mode)) |