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authorAlan Modra <amodra@gmail.com>1999-06-23 06:00:14 +0000
committerAlan Modra <amodra@gmail.com>1999-06-23 06:00:14 +0000
commit100845194443bced72b1388d1a5a260538993416 (patch)
treee9b78c29d2a12e3758a2c9fa6b7c989ed3d01a56 /opcodes/i386-dis.c
parent83d765b3ed5a085dd42d7e737b3a559cf2fc6d5d (diff)
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P
include/opcode/i386.h: Allow bswapl, arplw, and other dodgy insns. opcodes/i386-dis.c: Fix a comment
Diffstat (limited to 'opcodes/i386-dis.c')
-rw-r--r--opcodes/i386-dis.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 0dcbc62..e1d8f7e 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -341,9 +341,9 @@ struct dis386 {
'P' => print 'w' or 'l' if instruction has an operand size prefix,
or suffix_always is true
'Q' => print 'w' or 'l' if no register operands or suffix_always is true
- 'R' => print 'w' or 'l'
+ 'R' => print 'w' or 'l' ("wd" or "dq" in intel mode)
'S' => print 'w' or 'l' if suffix_always is true
- 'W' => print 'b' or 'w'
+ 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
*/
static const struct dis386 dis386_att[] = {