aboutsummaryrefslogtreecommitdiff
path: root/opcodes/i386-dis.c
diff options
context:
space:
mode:
authorH.J. Lu <hjl.tools@gmail.com>2019-06-04 12:45:20 -0700
committerH.J. Lu <hjl.tools@gmail.com>2019-06-04 12:45:33 -0700
commit63c6fc6cacf82e6b39f7373d44c1e1e1a0a757fa (patch)
tree3e831fa004f9e57c096800067866fa1fd16107c6 /opcodes/i386-dis.c
parentad118caa9f690114d11384b0813f30980cc333f3 (diff)
downloadgdb-63c6fc6cacf82e6b39f7373d44c1e1e1a0a757fa.zip
gdb-63c6fc6cacf82e6b39f7373d44c1e1e1a0a757fa.tar.gz
gdb-63c6fc6cacf82e6b39f7373d44c1e1e1a0a757fa.tar.bz2
i386: Check for reserved VEX.vvvv and EVEX.vvvv
If VEX.vvvv and EVEX.vvvv are reserved, they must be all 1s, which are all 0s in inverted form. Add check for unused VEX.vvvv and EVEX.vvvv when disassembling VEX and EVEX instructions. gas/ PR binutils/24626 * testsuite/gas/i386/disassem.s: Add tests for reserved VEX.vvvv and EVEX.vvvv. * testsuite/gas/i386/x86-64-disassem.s: Likewise. * testsuite/gas/i386/disassem.d: Updated. * testsuite/gas/i386/x86-64-disassem.d: Likewise. opcodes/ PR binutils/24626 * i386-dis.c (print_insn): Check for unused VEX.vvvv and EVEX.vvvv when disassembling VEX and EVEX instructions. (OP_VEX): Set vex.register_specifier to 0 after readding vex.register_specifier. (OP_Vex_2src_1): Likewise. (OP_Vex_2src_2): Likewise. (OP_LWP_E): Likewise. (OP_EX_Vex): Don't check vex.register_specifier. (OP_XMM_Vex): Likewise.
Diffstat (limited to 'opcodes/i386-dis.c')
-rw-r--r--opcodes/i386-dis.c24
1 files changed, 14 insertions, 10 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 18e6729..f597539 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -12155,6 +12155,14 @@ print_insn (bfd_vma pc, disassemble_info *info)
}
}
+ /* If VEX.vvvv and EVEX.vvvv are unused, they must be all 1s, which
+ are all 0s in inverted form. */
+ if (need_vex && vex.register_specifier != 0)
+ {
+ (*info->fprintf_func) (info->stream, "(bad)");
+ return end_codep - priv.the_buffer;
+ }
+
/* Check if the REX prefix is used. */
if (rex_ignored == 0 && (rex ^ rex_used) == 0 && last_rex_prefix >= 0)
all_prefixes[last_rex_prefix] = 0;
@@ -15921,6 +15929,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
return;
reg = vex.register_specifier;
+ vex.register_specifier = 0;
if (address_mode != mode_64bit)
reg &= 7;
else if (vex.evex && !vex.v)
@@ -16204,6 +16213,7 @@ OP_Vex_2src_1 (int bytemode, int sizeflag)
if (vex.w)
{
unsigned int reg = vex.register_specifier;
+ vex.register_specifier = 0;
if (address_mode != mode_64bit)
reg &= 7;
@@ -16221,6 +16231,7 @@ OP_Vex_2src_2 (int bytemode, int sizeflag)
else
{
unsigned int reg = vex.register_specifier;
+ vex.register_specifier = 0;
if (address_mode != mode_64bit)
reg &= 7;
@@ -16298,11 +16309,7 @@ static void
OP_EX_Vex (int bytemode, int sizeflag)
{
if (modrm.mod != 3)
- {
- if (vex.register_specifier != 0)
- BadOp ();
- need_vex_reg = 0;
- }
+ need_vex_reg = 0;
OP_EX (bytemode, sizeflag);
}
@@ -16310,11 +16317,7 @@ static void
OP_XMM_Vex (int bytemode, int sizeflag)
{
if (modrm.mod != 3)
- {
- if (vex.register_specifier != 0)
- BadOp ();
- need_vex_reg = 0;
- }
+ need_vex_reg = 0;
OP_XMM (bytemode, sizeflag);
}
@@ -16594,6 +16597,7 @@ OP_LWP_E (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
{
const char **names;
unsigned int reg = vex.register_specifier;
+ vex.register_specifier = 0;
if (rex & REX_W)
names = names64;