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authorIgor Tsimbalist <igor.v.tsimbalist@intel.com>2017-10-20 23:35:45 +0300
committerIgor Tsimbalist <igor.v.tsimbalist@intel.com>2017-10-23 15:58:18 +0300
commit8dcf1fadf2b0763962639fc5dcedc1892e502265 (patch)
tree9e26cf3963d19ba67cbd8c767d6aa5247902e823 /opcodes/i386-dis.c
parent48521003d5300e1390d78dbbcae83febe5808aaf (diff)
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Enable Intel VAES instructions.
Intel has disclosed a set of new instructions. The spec is https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf gas/ * config/tc-i386.c (cpu_arch): Add VAES. * doc/c-i386.texi: Document VAES. * testsuite/gas/i386/i386.exp: Run VAES tests. * testsuite/gas/i386/avx512f_vaes-intel.d: New test. * testsuite/gas/i386/avx512f_vaes-wig.s: Ditto. * testsuite/gas/i386/avx512f_vaes-wig1-intel.d: Ditto. * testsuite/gas/i386/avx512f_vaes-wig1.d: Ditto. * testsuite/gas/i386/avx512f_vaes.d: Ditto. * testsuite/gas/i386/avx512f_vaes.s: Ditto. * testsuite/gas/i386/avx512vl_vaes-intel.d: Ditto. * testsuite/gas/i386/avx512vl_vaes-wig.s: Ditto. * testsuite/gas/i386/avx512vl_vaes-wig1-intel.d: Ditto. * testsuite/gas/i386/avx512vl_vaes-wig1.d: Ditto. * testsuite/gas/i386/avx512vl_vaes.d: Ditto. * testsuite/gas/i386/avx512vl_vaes.s: Ditto. * testsuite/gas/i386/vaes-intel.d: Ditto. * testsuite/gas/i386/vaes.d: Ditto. * testsuite/gas/i386/vaes.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes-wig1-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes.s: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes-wig1-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes.s: Ditto. * testsuite/gas/i386/x86-64-vaes-intel.d: Ditto. * testsuite/gas/i386/x86-64-vaes.d: Ditto. * testsuite/gas/i386/x86-64-vaes.s: Ditto. opcodes/ * i386-dis.c (enum): Add PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE, PREFIX_EVEX_0F38DF. (enum): Remove VEX_LEN_0F38DC_P_2, VEX_LEN_0F38DD_P_2, VEX_LEN_0F38DE_P_2, VEX_LEN_0F38DF_P_2. (vex_len_table): Ditto. (enum): Remove VEX_W_0F38DC_P_2, VEX_W_0F38DD_P_2, VEX_W_0F38DE_P_2, VEX_W_0F38DF_P_2. (vew_w_table): Ditto. (prefix_table): Adjust instructions (see prefixes above). * i386-dis-evex.h (evex_table): Add new instructions (see prefixes above). * i386-gen.c (cpu_flag_init): Add VAES. (bitfield_cpu_flags): Ditto. * i386-opc.h (enum): Ditto. (i386_cpu_flags): Ditto. * i386-opc.tbl (vaes{enc,dec}{last,}): New instructions. * i386-init.h: Regenerate. * i386-tbl.h: Ditto.
Diffstat (limited to 'opcodes/i386-dis.c')
-rw-r--r--opcodes/i386-dis.c56
1 files changed, 8 insertions, 48 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index d5e5680..fe9fcd9 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1660,6 +1660,10 @@ enum
PREFIX_EVEX_0F38CC,
PREFIX_EVEX_0F38CD,
PREFIX_EVEX_0F38CF,
+ PREFIX_EVEX_0F38DC,
+ PREFIX_EVEX_0F38DD,
+ PREFIX_EVEX_0F38DE,
+ PREFIX_EVEX_0F38DF,
PREFIX_EVEX_0F3A00,
PREFIX_EVEX_0F3A01,
@@ -1865,10 +1869,6 @@ enum
VEX_LEN_0F3841_P_2,
VEX_LEN_0F385A_P_2_M_0,
VEX_LEN_0F38DB_P_2,
- VEX_LEN_0F38DC_P_2,
- VEX_LEN_0F38DD_P_2,
- VEX_LEN_0F38DE_P_2,
- VEX_LEN_0F38DF_P_2,
VEX_LEN_0F38F2_P_0,
VEX_LEN_0F38F3_R_1_P_0,
VEX_LEN_0F38F3_R_2_P_0,
@@ -2191,10 +2191,6 @@ enum
VEX_W_0F3879_P_2,
VEX_W_0F38CF_P_2,
VEX_W_0F38DB_P_2,
- VEX_W_0F38DC_P_2,
- VEX_W_0F38DD_P_2,
- VEX_W_0F38DE_P_2,
- VEX_W_0F38DF_P_2,
VEX_W_0F3A00_P_2,
VEX_W_0F3A01_P_2,
VEX_W_0F3A02_P_2,
@@ -6394,28 +6390,28 @@ static const struct dis386 prefix_table[][4] = {
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F38DC_P_2) },
+ { "vaesenc", { XM, Vex, EXx }, 0 },
},
/* PREFIX_VEX_0F38DD */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F38DD_P_2) },
+ { "vaesenclast", { XM, Vex, EXx }, 0 },
},
/* PREFIX_VEX_0F38DE */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F38DE_P_2) },
+ { "vaesdec", { XM, Vex, EXx }, 0 },
},
/* PREFIX_VEX_0F38DF */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F38DF_P_2) },
+ { "vaesdeclast", { XM, Vex, EXx }, 0 },
},
/* PREFIX_VEX_0F38F2 */
@@ -9940,26 +9936,6 @@ static const struct dis386 vex_len_table[][2] = {
{ VEX_W_TABLE (VEX_W_0F38DB_P_2) },
},
- /* VEX_LEN_0F38DC_P_2 */
- {
- { VEX_W_TABLE (VEX_W_0F38DC_P_2) },
- },
-
- /* VEX_LEN_0F38DD_P_2 */
- {
- { VEX_W_TABLE (VEX_W_0F38DD_P_2) },
- },
-
- /* VEX_LEN_0F38DE_P_2 */
- {
- { VEX_W_TABLE (VEX_W_0F38DE_P_2) },
- },
-
- /* VEX_LEN_0F38DF_P_2 */
- {
- { VEX_W_TABLE (VEX_W_0F38DF_P_2) },
- },
-
/* VEX_LEN_0F38F2_P_0 */
{
{ "andnS", { Gdq, VexGdq, Edq }, 0 },
@@ -11331,22 +11307,6 @@ static const struct dis386 vex_w_table[][2] = {
{ "vaesimc", { XM, EXx }, 0 },
},
{
- /* VEX_W_0F38DC_P_2 */
- { "vaesenc", { XM, Vex128, EXx }, 0 },
- },
- {
- /* VEX_W_0F38DD_P_2 */
- { "vaesenclast", { XM, Vex128, EXx }, 0 },
- },
- {
- /* VEX_W_0F38DE_P_2 */
- { "vaesdec", { XM, Vex128, EXx }, 0 },
- },
- {
- /* VEX_W_0F38DF_P_2 */
- { "vaesdeclast", { XM, Vex128, EXx }, 0 },
- },
- {
/* VEX_W_0F3A00_P_2 */
{ Bad_Opcode },
{ "vpermq", { XM, EXx, Ib }, 0 },