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authorJan Beulich <jbeulich@novell.com>2018-11-06 11:43:55 +0100
committerJan Beulich <jbeulich@suse.com>2018-11-06 11:43:55 +0100
commitb50c9f31661be05bcd73fb1158e02f606e696948 (patch)
tree80c3662241c3d1bc92b3e45c5e86dbf081bb6e2d /opcodes/i386-dis-evex.h
parent931d03b75aa934abc10a70f1aa3ca1192f32ed3d (diff)
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x86: adjust {,E}VEX.W handling for PEXTR* / PINSR*
PEXTR{B,W} and PINSR{B,W}, just like for AVX512BW, are WIG, no matter that the SDM uses a nonstandard description of that fact. PEXTRD, even with EVEX.W set, ignores that bit outside of 64-bit mode, just like its AVX counterpart.
Diffstat (limited to 'opcodes/i386-dis-evex.h')
-rw-r--r--opcodes/i386-dis-evex.h14
1 files changed, 2 insertions, 12 deletions
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 73b6568..22c9165 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -2663,7 +2663,7 @@ static const struct dis386 evex_table[][256] = {
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F3A16_P_2) },
+ { "vpextrK", { Edq, XM, Ib }, 0 },
},
/* PREFIX_EVEX_0F3A17 */
{
@@ -2729,7 +2729,7 @@ static const struct dis386 evex_table[][256] = {
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F3A22_P_2) },
+ { "vpinsrK", { XM, Vex128, Edq, Ib }, 0 },
},
/* PREFIX_EVEX_0F3A23 */
{
@@ -3892,11 +3892,6 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ "vrndscalesd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS, Ib }, 0 },
},
- /* EVEX_W_0F3A16_P_2 */
- {
- { "vpextrd", { Edqd, XM, Ib }, 0 },
- { "vpextrq", { Eq, XM, Ib }, 0 },
- },
/* EVEX_W_0F3A18_P_2 */
{
{ "vinsertf32x4", { XM, Vex, EXxmm, Ib }, 0 },
@@ -3925,11 +3920,6 @@ static const struct dis386 evex_table[][256] = {
{
{ "vinsertps", { XMM, Vex, EXxmm_md, Ib }, 0 },
},
- /* EVEX_W_0F3A22_P_2 */
- {
- { "vpinsrd", { XM, Vex128, Edqd, Ib }, 0 },
- { "vpinsrq", { XM, Vex128, Eq, Ib }, 0 },
- },
/* EVEX_W_0F3A23_P_2 */
{
{ "vshuff32x4", { XM, Vex, EXx, Ib }, 0 },