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| author | Jan Beulich <jbeulich@novell.com> | 2015-04-23 16:42:40 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2015-04-23 16:42:40 +0200 |
| commit | 04d824a468650c632d228b977006139f17d646a4 (patch) | |
| tree | 1fc66e25aab33ba9ef1109ec3d6a0ad7001539b2 /opcodes/i386-dis-evex.h | |
| parent | af508cb92f8fa7eed6c7f2bd3a49d42701db5900 (diff) | |
| download | gdb-04d824a468650c632d228b977006139f17d646a4.zip gdb-04d824a468650c632d228b977006139f17d646a4.tar.gz gdb-04d824a468650c632d228b977006139f17d646a4.tar.bz2 | |
x86: disambiguate disassembly of certain AVX512 insns
Certain conversion operations as well as vfpclassp{d,s} are ambiguous
when the input operand is in memory and no broadcast is being used.
While in Intel mode this gets resolved by printing suitable operand
size modifiers, AT&T mode need mnemonic suffixes to be added.
gas/testsuite/
2015-04-23 Jan Beulich <jbeulich@suse.com>
* gas/i386/avx512dq.d: Add 'z' suffix to vfpclassp{d,s} non-
register, non-broadcast cases.
* gas/i386/x86-64-avx512dq.d: Likewise.
* gas/i386/avx512dq_vl.d: Add 'x' and 'y' suffixes to
vcvt{,u}qq2ps and vfpclassp{d,s} non-register, non-broadcast
cases.
* gas/i386/x86-64-avx512dq_vl.d: Likewise.
* gas/i386/avx512f_vl.d: Add 'x' and 'y' suffixes to
vcvt{,t}pd2{,u}dq and vcvtpd2ps non-register, non-broadcast
cases.
* gas/i386/x86-64-avx512f_vl.d: Likewise.
opcodes/
2015-04-23 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (putop): Extend "XY" handling to AVX512. Handle "XZ".
* i386-dis-evex.h.c (vcvtpd2ps, vcvtqq2ps, vcvttpd2udq,
vcvtpd2udq, vcvtuqq2ps, vcvttpd2dq, vcvtpd2dq): Add %XY.
(vfpclasspd, vfpclassps): Add %XZ.
Diffstat (limited to 'opcodes/i386-dis-evex.h')
| -rw-r--r-- | opcodes/i386-dis-evex.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h index 14426b0..551ecdf 100644 --- a/opcodes/i386-dis-evex.h +++ b/opcodes/i386-dis-evex.h @@ -3025,7 +3025,7 @@ static const struct dis386 evex_table[][256] = { /* EVEX_W_0F5A_P_2 */ { { Bad_Opcode }, - { "vcvtpd2ps", { XMxmmq, EXx, EXxEVexR }, 0 }, + { "vcvtpd2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, }, /* EVEX_W_0F5A_P_3 */ { @@ -3035,7 +3035,7 @@ static const struct dis386 evex_table[][256] = { /* EVEX_W_0F5B_P_0 */ { { "vcvtdq2ps", { XM, EXx, EXxEVexR }, 0 }, - { "vcvtqq2ps", { XMxmmq, EXx, EXxEVexR }, 0 }, + { "vcvtqq2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, }, /* EVEX_W_0F5B_P_1 */ { @@ -3192,7 +3192,7 @@ static const struct dis386 evex_table[][256] = { /* EVEX_W_0F78_P_0 */ { { "vcvttps2udq", { XM, EXx, EXxEVexS }, 0 }, - { "vcvttpd2udq", { XMxmmq, EXx, EXxEVexS }, 0 }, + { "vcvttpd2udq%XY", { XMxmmq, EXx, EXxEVexS }, 0 }, }, /* EVEX_W_0F78_P_2 */ { @@ -3202,7 +3202,7 @@ static const struct dis386 evex_table[][256] = { /* EVEX_W_0F79_P_0 */ { { "vcvtps2udq", { XM, EXx, EXxEVexR }, 0 }, - { "vcvtpd2udq", { XMxmmq, EXx, EXxEVexR }, 0 }, + { "vcvtpd2udq%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, }, /* EVEX_W_0F79_P_2 */ { @@ -3222,7 +3222,7 @@ static const struct dis386 evex_table[][256] = { /* EVEX_W_0F7A_P_3 */ { { "vcvtudq2ps", { XM, EXx, EXxEVexR }, 0 }, - { "vcvtuqq2ps", { XMxmmq, EXx, EXxEVexR }, 0 }, + { "vcvtuqq2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, }, /* EVEX_W_0F7B_P_1 */ { @@ -3318,12 +3318,12 @@ static const struct dis386 evex_table[][256] = { /* EVEX_W_0FE6_P_2 */ { { Bad_Opcode }, - { "vcvttpd2dq", { XMxmmq, EXx, EXxEVexS }, 0 }, + { "vcvttpd2dq%XY", { XMxmmq, EXx, EXxEVexS }, 0 }, }, /* EVEX_W_0FE6_P_3 */ { { Bad_Opcode }, - { "vcvtpd2dq", { XMxmmq, EXx, EXxEVexR }, 0 }, + { "vcvtpd2dq%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, }, /* EVEX_W_0FE7_P_2 */ { @@ -3800,8 +3800,8 @@ static const struct dis386 evex_table[][256] = { }, /* EVEX_W_0F3A66_P_2 */ { - { "vfpclassps", { XMask, EXx, Ib }, 0 }, - { "vfpclasspd", { XMask, EXx, Ib }, 0 }, + { "vfpclassps%XZ", { XMask, EXx, Ib }, 0 }, + { "vfpclasspd%XZ", { XMask, EXx, Ib }, 0 }, }, /* EVEX_W_0F3A67_P_2 */ { |