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author | Jan Beulich <jbeulich@suse.com> | 2021-03-25 08:20:19 +0100 |
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committer | Jan Beulich <jbeulich@suse.com> | 2021-03-25 08:20:19 +0100 |
commit | 596a02ff558a88b7ad75a9904fe3d6b1615fdd1a (patch) | |
tree | 9792392f00d127938602595c4142cc47a309118d /opcodes/i386-dis-evex.h | |
parent | 5364285240737423a4d6368aba803a031d293b95 (diff) | |
download | gdb-596a02ff558a88b7ad75a9904fe3d6b1615fdd1a.zip gdb-596a02ff558a88b7ad75a9904fe3d6b1615fdd1a.tar.gz gdb-596a02ff558a88b7ad75a9904fe3d6b1615fdd1a.tar.bz2 |
x86: flag bad S/G insn operand combinations
For VEX-encoded ones, all three involved vector registers have to be
distinct. For EVEX-encoded ones an actual mask register has to be in use
and zeroing-masking cannot be used (violation of either will #UD).
Additionally both involved vector registers have to be distinct for
EVEX-encoded gathers.
Diffstat (limited to 'opcodes/i386-dis-evex.h')
-rw-r--r-- | opcodes/i386-dis-evex.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h index ec50104..151f61d 100644 --- a/opcodes/i386-dis-evex.h +++ b/opcodes/i386-dis-evex.h @@ -455,9 +455,9 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, { "vpshufbitqmb", { XMask, Vex, EXx }, PREFIX_DATA }, /* 90 */ - { "vpgatherd%DQ", { XM, MVexVSIBDWpX }, PREFIX_DATA }, + { "vpgatherd%DQ", { XMGatherD, MVexVSIBDWpX }, PREFIX_DATA }, { "vpgatherq%DQ", { XMGatherQ, MVexVSIBQWpX }, PREFIX_DATA }, - { "vgatherdp%XW", { XM, MVexVSIBDWpX}, PREFIX_DATA }, + { "vgatherdp%XW", { XMGatherD, MVexVSIBDWpX }, PREFIX_DATA }, { "vgatherqp%XW", { XMGatherQ, MVexVSIBQWpX }, PREFIX_DATA }, { Bad_Opcode }, { Bad_Opcode }, |