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| author | Omair Javaid <omair.javaid@linaro.org> | 2014-08-28 14:50:06 +0500 |
|---|---|---|
| committer | Omair Javaid <omair.javaid@linaro.org> | 2014-09-16 03:53:02 +0500 |
| commit | 60cc5e93e5f96268f20abf0b66025443911b23bc (patch) | |
| tree | 480be90b8dde440b280b2eb4c2b51bea962ba8e3 /opcodes/frv-opc.h | |
| parent | a50942089dda154e9c1b0a8311aa5e07193712cc (diff) | |
| download | gdb-60cc5e93e5f96268f20abf0b66025443911b23bc.zip gdb-60cc5e93e5f96268f20abf0b66025443911b23bc.tar.gz gdb-60cc5e93e5f96268f20abf0b66025443911b23bc.tar.bz2 | |
Implement support for recording arm/thumb mode coprocessor instructions
gdb:
2014-08-13 Omair Javaid <omair.javaid@linaro.org>
* arm-tdep.c (arm_record_coproc_data_proc): Add record handler stubs
for asimd, vfp and coprocessor insns.
(arm_record_asimd_vfp_coproc): Add record handler for asimd, vfp
and coprocessor insns.
(thumb2_record_coproc_insn): New function.
(thumb2_record_decode_insn_handler): Update coprocessor insns record
handlers.
(decode_insn): Install arm_record_asimd_vfp_coproc as handler for
opcode 110 insns.
Diffstat (limited to 'opcodes/frv-opc.h')
0 files changed, 0 insertions, 0 deletions