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author | Jim Wilson <jimw@sifive.com> | 2021-09-08 18:15:39 -0700 |
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committer | Jim Wilson <jimw@sifive.com> | 2021-09-08 18:23:30 -0700 |
commit | c7dee84894df6231bb7fce34cf36242c34d7f891 (patch) | |
tree | a5127cce4214f892f3c152da6c7d53c52ff89b9f /opcodes/fr30-asm.c | |
parent | d0d2fb0a25517c39ecdec504c7a9a7943247cd86 (diff) | |
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RISC-V: Pretty print values formed with lui and addiw.
The disassembler has support to pretty print values created by an lui/addi
pair, but there is no support for addiw. There is also no support for
c.addi and c.addiw. This patch extends the pretty printing support to
handle these 3 instructions in addition to addi. Existing testcases serve
as tests for the new feature.
opcodes/
* riscv-dis.c (maybe_print_address): New arg wide. Sign extend when
wide is true.
(print_insn_args): Fix calls to maybe_print_address. Add checks for
c.addi, c.addiw, and addiw, and call maybe_print_address for them.
gas/
* testsuite/gas/riscv/insn.d: Update for disassembler change.
* testsuite/gas/li32.d, testsuite/gas/li64.d: Likwise.
* testsuite/gas/lla64.d: Likewise.
Diffstat (limited to 'opcodes/fr30-asm.c')
0 files changed, 0 insertions, 0 deletions