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author | Martin Hunt <hunt@redhat.com> | 1996-07-26 18:59:21 +0000 |
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committer | Martin Hunt <hunt@redhat.com> | 1996-07-26 18:59:21 +0000 |
commit | 3dd5a8d3377edb5b6cc54f61e49005a7e427efbd (patch) | |
tree | b2fdf83fafd9b06e56a2d1fac1ac38f77b8f2700 /opcodes/d10v-opc.c | |
parent | 76327337ceaab0cfb332128d2949bfaded96eb90 (diff) | |
download | gdb-3dd5a8d3377edb5b6cc54f61e49005a7e427efbd.zip gdb-3dd5a8d3377edb5b6cc54f61e49005a7e427efbd.tar.gz gdb-3dd5a8d3377edb5b6cc54f61e49005a7e427efbd.tar.bz2 |
Fri Jul 26 11:45:04 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
(d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.
Diffstat (limited to 'opcodes/d10v-opc.c')
-rw-r--r-- | opcodes/d10v-opc.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/opcodes/d10v-opc.c b/opcodes/d10v-opc.c index 755d230..07d5428 100644 --- a/opcodes/d10v-opc.c +++ b/opcodes/d10v-opc.c @@ -90,7 +90,9 @@ const struct d10v_operand d10v_operands[] = { 4, 1, OPERAND_NUM|OPERAND_SIGNED }, #define UNUM4 (NUM4 + 1) { 4, 1, OPERAND_NUM }, -#define UNUM8 (UNUM4 + 1) /* repi */ +#define UNUM4S (UNUM4 + 1) /* slli, srai, srli */ + { 4, 1, OPERAND_NUM|OPERAND_SHIFT }, +#define UNUM8 (UNUM4S + 1) /* repi */ { 8, 16, OPERAND_NUM }, #define UNUM16 (UNUM8 + 1) /* cmpui */ { 16, 0, OPERAND_NUM }, @@ -254,16 +256,16 @@ const struct d10v_opcode d10v_opcodes[] = { { "sll", SHORT_2, 1, IU, PAR, 0x2200, 0x7e01, { RDST, RSRC } }, { "sll", SHORT_2, 1, IU, PAR, 0x3200, 0x7ee1, { ADST, RSRC } }, { "slli", SHORT_2, 1, IU, PAR, 0x2201, 0x7e01, { RDST, UNUM4 } }, - { "slli", SHORT_2, 1, IU, PAR, 0x3201, 0x7ee1, { ADST, UNUM4 } }, + { "slli", SHORT_2, 1, IU, PAR, 0x3201, 0x7ee1, { ADST, UNUM4S } }, { "slx", SHORT_2, 1, IU, PAR, 0x460b, 0x7e1f, { RDST } }, { "sra", SHORT_2, 1, IU, PAR, 0x2400, 0x7e01, { RDST, RSRC } }, { "sra", SHORT_2, 1, IU, PAR, 0x3400, 0x7ee1, { ADST, RSRC } }, { "srai", SHORT_2, 1, IU, PAR, 0x2401, 0x7e01, { RDST, UNUM4 } }, - { "srai", SHORT_2, 1, IU, PAR, 0x3401, 0x7ee1, { ADST, UNUM4 } }, + { "srai", SHORT_2, 1, IU, PAR, 0x3401, 0x7ee1, { ADST, UNUM4S } }, { "srl", SHORT_2, 1, IU, PAR, 0x2000, 0x7e01, { RDST, RSRC } }, { "srl", SHORT_2, 1, IU, PAR, 0x3000, 0x7ee1, { ADST, RSRC } }, { "srli", SHORT_2, 1, IU, PAR, 0x2001, 0x7e01, { RDST, UNUM4 } }, - { "srli", SHORT_2, 1, IU, PAR, 0x3001, 0x7ee1, { ADST, UNUM4 } }, + { "srli", SHORT_2, 1, IU, PAR, 0x3001, 0x7ee1, { ADST, UNUM4S } }, { "srx", SHORT_2, 1, IU, PAR, 0x4609, 0x7e1f, { RDST } }, { "st", LONG_L, 1, MU, SEQ, 0x34000000, 0x3f000000, { RSRC2, ATPAR, NUM16, RSRC } }, { "st", SHORT_2, 1, MU, PAR, 0x6800, 0x7e01, { RSRC2, ATSIGN, RSRC } }, |