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authorM R Swami Reddy <MR.Swami.Reddy@nsc.com>2008-11-27 11:30:33 +0000
committerM R Swami Reddy <MR.Swami.Reddy@nsc.com>2008-11-27 11:30:33 +0000
commit59b098c97067d1eb3516e704e3941ca4b4701d1b (patch)
treee7bb1c4b7210f9421cd4cd81dada27743e6c1b3e /opcodes/cr16-dis.c
parente1c93c699b7dceb3fc41fb039ff5fecea73677ba (diff)
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* cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
adjusted the mask for 32-bit branch instruction.
Diffstat (limited to 'opcodes/cr16-dis.c')
-rw-r--r--opcodes/cr16-dis.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/opcodes/cr16-dis.c b/opcodes/cr16-dis.c
index de3eb75..2627141 100644
--- a/opcodes/cr16-dis.c
+++ b/opcodes/cr16-dis.c
@@ -322,7 +322,7 @@ match_opcode (void)
{
unsigned long mask;
/* The instruction 'constant' opcode doewsn't exceed 32 bits. */
- unsigned long doubleWord = words[1] + (words[0] << 16);
+ unsigned long doubleWord = (words[1] + (words[0] << 16)) & 0xffffffff;
/* Start searching from end of instruction table. */
instruction = &cr16_instruction[NUMOPCODES - 2];
@@ -331,6 +331,10 @@ match_opcode (void)
while (instruction >= cr16_instruction)
{
mask = build_mask ();
+ /* Adjust mask for bcond with 32-bit size instruction */
+ if ((IS_INSN_MNEMONIC("b") && instruction->size == 2))
+ mask = 0xff0f0000;
+
if ((doubleWord & mask) == BIN (instruction->match,
instruction->match_bits))
return 1;