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authorClaudiu Zissulescu <claziss@gmail.com>2023-09-25 10:55:51 +0300
committerClaudiu Zissulescu <claziss@gmail.com>2023-09-25 10:55:51 +0300
commitc99dc76089a2de97ea0ee755aa8e87037a17b6d6 (patch)
tree9ced921df582321875ef28acd9e37024c82d87e2 /opcodes/configure.ac
parentf3d38d7d0b7346515ba603454feeddc58a3fc451 (diff)
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arc: Add new opcode functions for ARCv3 ISA.
opcodes/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> Cupertino Miranda <cmiranda@synopsys.com> * opcodes/Makefile.am: Add ARC64 opcode file. * opcodes/Makefile.in: Regenerate. * opcodes/arc-opc.c: Move the common functionality to arcxx-opc.inc. Keep only ARCv2 ARCv1 specifics. * opcodes/arc-ext-tbl.h: Deleted file. * opcodes/arcxx-opc.inc: New file. * opcodes/arc64-opc.c: Likewise. * opcodes/arc-fxi.h (insert_uimm9_a32_11_s): New function. (extract_uimm9_a32_11_s): Likewise. (insert_uimm10_13_s): Likewise. (extract_uimm10_13_s): Likewise. * opcodes/configure: Regenerate. * opcodes/configure.ac: Add ARC64 target. * opcodes/disassemble.c: Likewise. * opcodes/arc-dis.c (regmod_t): New type. (regmods): New structure. (fpnames): New strings with fp-regs name. (REG_PCL, REG_LIMM, REG_LIMM_S, REG_U32, REG_S32): New defines. (getregname): New function. (find_format_from_table): Discriminate between signed and unsigned 32bit immediates. (find_format): Handle extract function for flags. (arc_insn_length): Update insn lengths to various architectures. (print_insn_arc): Update printing for various ARC architectures. * opcodes/arc-flag-classes.def: New file. * opcodes/arc-flag.def: New file. * opcodes/arc-operands.def: New file. * opcodes/arc-regs.h: Changed. Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
Diffstat (limited to 'opcodes/configure.ac')
-rw-r--r--opcodes/configure.ac1
1 files changed, 1 insertions, 0 deletions
diff --git a/opcodes/configure.ac b/opcodes/configure.ac
index cae2a67..d112574 100644
--- a/opcodes/configure.ac
+++ b/opcodes/configure.ac
@@ -268,6 +268,7 @@ if test x${all_targets} = xfalse ; then
bfd_alpha_arch) ta="$ta alpha-dis.lo alpha-opc.lo" ;;
bfd_amdgcn_arch) ;;
bfd_arc_arch) ta="$ta arc-dis.lo arc-opc.lo arc-ext.lo" ;;
+ bfd_arc64_arch) ta="$ta arc-dis.lo arc64-opc.lo arc-ext.lo" ;;
bfd_arm_arch) ta="$ta arm-dis.lo" ;;
bfd_avr_arch) ta="$ta avr-dis.lo" ;;
bfd_bfin_arch) ta="$ta bfin-dis.lo" ;;