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authorJose E. Marchesi <jose.marchesi@oracle.com>2020-06-04 16:14:41 +0200
committerJose E. Marchesi <jose.marchesi@oracle.com>2020-06-04 16:17:42 +0200
commitb3db6d07be467fe86f5b4185a8fc7bec49380c1f (patch)
tree8486190d571c898ad12e24350e5e06a59a5bfac0 /opcodes/bpf-dis.c
parent0cfcd4f003ce0ed5467fd0ceeff4a191439c5923 (diff)
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opcodes: support insn endianness in cgen_cpu_open
This patch adds support for a new CGEN_OPEN_INSN_ENDIAN argument for @arch@_cgen_cpu_open. This is useful for architectures in which the endianness of the instruction words is not the same than the endianness used for data. An accompanying patch has been sent to the CGEN mailing list that adds support for this argument on the CGEN side [1]. Its been already pre-approved [2], and will be applied simultaneously with this binutils series. [1] https://sourceware.org/pipermail/cgen/2020q2/002733.html [2] https://sourceware.org/pipermail/cgen/2020q2/002737.html include/ChangeLog: 2020-06-04 Jose E. Marchesi <jemarch@gnu.org> * opcode/cgen.h (enum cgen_cpu_open_arg): New value CGEN_CPU_OPEN_INSN_ENDIAN. opcodes/ChangeLog: 2020-06-04 Jose E. Marchesi <jemarch@gnu.org> * cgen-dis.in (cpu_desc_list): New field `insn_endian'. (print_insn_): Handle instruction endian. * bpf-dis.c: Regenerate. * bpf-desc.c: Regenerate. * epiphany-dis.c: Likewise. * epiphany-desc.c: Likewise. * fr30-dis.c: Likewise. * fr30-desc.c: Likewise. * frv-dis.c: Likewise. * frv-desc.c: Likewise. * ip2k-dis.c: Likewise. * ip2k-desc.c: Likewise. * iq2000-dis.c: Likewise. * iq2000-desc.c: Likewise. * lm32-dis.c: Likewise. * lm32-desc.c: Likewise. * m32c-dis.c: Likewise. * m32c-desc.c: Likewise. * m32r-dis.c: Likewise. * m32r-desc.c: Likewise. * mep-dis.c: Likewise. * mep-desc.c: Likewise. * mt-dis.c: Likewise. * mt-desc.c: Likewise. * or1k-dis.c: Likewise. * or1k-desc.c: Likewise. * xc16x-dis.c: Likewise. * xc16x-desc.c: Likewise. * xstormy16-dis.c: Likewise. * xstormy16-desc.c: Likewise. binutils/ChangeLog: 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> * objdump.c (disassemble_data): Set disasm_info.endian_code to disasm_info.endian after the latter is initialized to the endianness reported by BFD.
Diffstat (limited to 'opcodes/bpf-dis.c')
-rw-r--r--opcodes/bpf-dis.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/opcodes/bpf-dis.c b/opcodes/bpf-dis.c
index 60e0d96..21d9308 100644
--- a/opcodes/bpf-dis.c
+++ b/opcodes/bpf-dis.c
@@ -507,6 +507,7 @@ typedef struct cpu_desc_list
CGEN_BITSET *isa;
int mach;
int endian;
+ int insn_endian;
CGEN_CPU_DESC cd;
} cpu_desc_list;
@@ -519,12 +520,16 @@ print_insn_bpf (bfd_vma pc, disassemble_info *info)
static CGEN_BITSET *prev_isa;
static int prev_mach;
static int prev_endian;
+ static int prev_insn_endian;
int length;
CGEN_BITSET *isa;
int mach;
int endian = (info->endian == BFD_ENDIAN_BIG
? CGEN_ENDIAN_BIG
: CGEN_ENDIAN_LITTLE);
+ int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
+ ? CGEN_ENDIAN_BIG
+ : CGEN_ENDIAN_LITTLE);
enum bfd_architecture arch;
/* ??? gdb will set mach but leave the architecture as "unknown" */
@@ -590,9 +595,11 @@ print_insn_bpf (bfd_vma pc, disassemble_info *info)
prev_isa = cgen_bitset_copy (isa);
prev_mach = mach;
prev_endian = endian;
+ prev_insn_endian = insn_endian;
cd = bpf_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
CGEN_CPU_OPEN_BFDMACH, mach_name,
CGEN_CPU_OPEN_ENDIAN, prev_endian,
+ CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
CGEN_CPU_OPEN_END);
if (!cd)
abort ();