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authorJose E. Marchesi <jose.marchesi@oracle.com>2019-07-14 14:45:31 +0200
committerJose E. Marchesi <jose.marchesi@oracle.com>2019-07-14 14:45:31 +0200
commit92434a14b97bf07546701613a16aaf4d8a3b3eca (patch)
treee60ab4f22c2660c51d887ff4c23aaf965c34df0f /opcodes/bpf-desc.c
parentda73816739483bac537403262cef1c460e43319f (diff)
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cpu,opcodes,gas: fix arguments to ldabs and ldind eBPF instructions
The eBPF non-generic load instructions ldind{b,h,w,dw} and ldabs{b,h,w,dw} do not take an explicit destination register as an argument. Instead, they put the loaded value in %r0, implicitly. This patch fixes the CPU BPF description to not expect a 'dst' argument in these arguments, regenerates the corresponding files in opcodes, and updates the impacted GAS tests. Tested in a x86-64 host. cpu/ChangeLog: 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf.cpu (dlsi): ldabs and ldind instructions do not take an explicit 'dst' argument. opcodes/ChangeLog: 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-desc.c: Regenerate. * bpf-opc.c: Likewise. gas/ChangeLog: 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/bpf/mem.s: Do not use explicit arguments for ldabs and ldind instructions. * testsuite/gas/bpf/mem.d: Updated accordingly. * testsuite/gas/bpf/mem-be.d: Likewise.
Diffstat (limited to 'opcodes/bpf-desc.c')
-rw-r--r--opcodes/bpf-desc.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/opcodes/bpf-desc.c b/opcodes/bpf-desc.c
index 4c94723..3b94335 100644
--- a/opcodes/bpf-desc.c
+++ b/opcodes/bpf-desc.c
@@ -824,82 +824,82 @@ static const CGEN_IBASE bpf_cgen_insn_table[MAX_INSNS] =
BPF_INSN_LDDWBE, "lddwbe", "lddw", 128,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
},
-/* ldabsw $dstle,$srcle,$imm32 */
+/* ldabsw $srcle,$imm32 */
{
BPF_INSN_LDABSWLE, "ldabswle", "ldabsw", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
},
-/* ldabsh $dstle,$srcle,$imm32 */
+/* ldabsh $srcle,$imm32 */
{
BPF_INSN_LDABSHLE, "ldabshle", "ldabsh", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
},
-/* ldabsb $dstle,$srcle,$imm32 */
+/* ldabsb $srcle,$imm32 */
{
BPF_INSN_LDABSBLE, "ldabsble", "ldabsb", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
},
-/* ldabsdw $dstle,$srcle,$imm32 */
+/* ldabsdw $srcle,$imm32 */
{
BPF_INSN_LDABSDWLE, "ldabsdwle", "ldabsdw", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
},
-/* ldindw $dstle,$srcle,$imm32 */
+/* ldindw $srcle,$imm32 */
{
BPF_INSN_LDINDWLE, "ldindwle", "ldindw", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
},
-/* ldindh $dstle,$srcle,$imm32 */
+/* ldindh $srcle,$imm32 */
{
BPF_INSN_LDINDHLE, "ldindhle", "ldindh", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
},
-/* ldindb $dstle,$srcle,$imm32 */
+/* ldindb $srcle,$imm32 */
{
BPF_INSN_LDINDBLE, "ldindble", "ldindb", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
},
-/* ldinddw $dstle,$srcle,$imm32 */
+/* ldinddw $srcle,$imm32 */
{
BPF_INSN_LDINDDWLE, "ldinddwle", "ldinddw", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
},
-/* ldabsw $dstbe,$srcbe,$imm32 */
+/* ldabsw $srcbe,$imm32 */
{
BPF_INSN_LDABSWBE, "ldabswbe", "ldabsw", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
},
-/* ldabsh $dstbe,$srcbe,$imm32 */
+/* ldabsh $srcbe,$imm32 */
{
BPF_INSN_LDABSHBE, "ldabshbe", "ldabsh", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
},
-/* ldabsb $dstbe,$srcbe,$imm32 */
+/* ldabsb $srcbe,$imm32 */
{
BPF_INSN_LDABSBBE, "ldabsbbe", "ldabsb", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
},
-/* ldabsdw $dstbe,$srcbe,$imm32 */
+/* ldabsdw $srcbe,$imm32 */
{
BPF_INSN_LDABSDWBE, "ldabsdwbe", "ldabsdw", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
},
-/* ldindw $dstbe,$srcbe,$imm32 */
+/* ldindw $srcbe,$imm32 */
{
BPF_INSN_LDINDWBE, "ldindwbe", "ldindw", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
},
-/* ldindh $dstbe,$srcbe,$imm32 */
+/* ldindh $srcbe,$imm32 */
{
BPF_INSN_LDINDHBE, "ldindhbe", "ldindh", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
},
-/* ldindb $dstbe,$srcbe,$imm32 */
+/* ldindb $srcbe,$imm32 */
{
BPF_INSN_LDINDBBE, "ldindbbe", "ldindb", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
},
-/* ldinddw $dstbe,$srcbe,$imm32 */
+/* ldinddw $srcbe,$imm32 */
{
BPF_INSN_LDINDDWBE, "ldinddwbe", "ldinddw", 64,
{ 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }